From e4b0e8ed6d3397698913ab946c54437107830fd8 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Mon, 6 May 2013 14:21:39 +0200 Subject: [PATCH] xilinx_ise: enable register balancing --- mibuild/xilinx_ise.py | 1 + 1 file changed, 1 insertion(+) diff --git a/mibuild/xilinx_ise.py b/mibuild/xilinx_ise.py index 63e68bfc..85d27712 100644 --- a/mibuild/xilinx_ise.py +++ b/mibuild/xilinx_ise.py @@ -81,6 +81,7 @@ def _build_files(device, sources, named_sc, named_pc, build_name): -ifmt MIXED -opt_mode SPEED -reduce_control_sets auto +-register_balancing yes -ofn %s.ngc -p %s""" % (build_name, build_name, device) tools.write_to_file(build_name + ".xst", xst_contents) -- 2.30.2