From e4bcab82aa8625426e25d702fccc4f7547723284 Mon Sep 17 00:00:00 2001
From: "colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0"
 <colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0@web>
Date: Sun, 2 May 2021 23:17:35 +0100
Subject: [PATCH]

---
 task_db/mdwn/cole.mdwn | 77 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)
 create mode 100644 task_db/mdwn/cole.mdwn

diff --git a/task_db/mdwn/cole.mdwn b/task_db/mdwn/cole.mdwn
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+<!-- autogenerated by budget-sync -->
+
+# Cole Poirier
+
+
+
+# Status Tracking
+
+
+## Currently working on
+
+* [Bug #340](https://bugs.libre-soc.org/show_bug.cgi?id=340):
+  formal proof of POWER9 SHIFTROT pipeline needed
+* [Bug #448](https://bugs.libre-soc.org/show_bug.cgi?id=448):
+  MUL pipeline unit tests
+* [Bug #450](https://bugs.libre-soc.org/show_bug.cgi?id=450):
+  Create MMU from microwatt mmu\.vhdl
+
+## Completed but not yet paid
+
+
+### NLNet.2019.10.Wishbone
+
+* [Bug #493](https://bugs.libre-soc.org/show_bug.cgi?id=493):
+  DMI JTAG TAP needed
+    * submitted on 2021-04-25
+    * &euro;150 out of total of &euro;400
+
+### NLNet.2019.Coriolis2
+
+* [Bug #502](https://bugs.libre-soc.org/show_bug.cgi?id=502):
+  determine SRAM block size and implement it
+    * submitted on 2021-04-25
+    * &euro;50 out of total of &euro;1250
+
+## Paid by NLNet
+
+
+### NLNet.2019.10.Wishbone
+
+* [Bug #325](https://bugs.libre-soc.org/show_bug.cgi?id=325):
+  create POWER9 TRAP pipeline
+    * submitted on 2020-09-20
+    * paid on 2020-10-01
+    * &euro;100 out of total of &euro;500
+* [Bug #351](https://bugs.libre-soc.org/show_bug.cgi?id=351):
+  create a "block" \(mass\) regfile port \(read and write\) onto an array\-based regfile
+    * submitted on 2020-09-20
+    * paid on 2020-10-01
+    * &euro;100 out of total of &euro;200
+* [Bug #401](https://bugs.libre-soc.org/show_bug.cgi?id=401):
+  Convert Memory Architecture diagram from hand\-drawn to editable SVG
+    * submitted on 2020-09-20
+    * paid on 2020-10-01
+    * &euro;150 which is the total amount
+* [Bug #404](https://bugs.libre-soc.org/show_bug.cgi?id=404):
+  adding nmigen\-soc as a dependency needs documentation updated
+    * submitted on 2020-09-20
+    * paid on 2020-10-01
+    * &euro;100 which is the total amount
+* [Bug #472](https://bugs.libre-soc.org/show_bug.cgi?id=472):
+  tutorial and dev page needed for mesa driver
+    * submitted on 2020-09-20
+    * paid on 2020-10-01
+    * &euro;100 which is the total amount
+
+### NLNet.2019.Coriolis2
+
+* [Bug #178](https://bugs.libre-soc.org/show_bug.cgi?id=178):
+  first coriolis2 tutorial, workflow and "test project" page
+    * paid on 2020-12-20
+    * &euro;500 out of total of &euro;3000
+* [Bug #291](https://bugs.libre-soc.org/show_bug.cgi?id=291):
+  HDL Workflow and Coriolis2 chroot automated setup scripts
+    * submitted on 2020-09-20
+    * paid on 2020-10-01
+    * &euro;200 which is the total amount
-- 
2.30.2