From e4f531a739b6f68bdee964253c00c1f8feca6c92 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 20 Jan 2012 22:20:32 +0100 Subject: [PATCH] Include unused I/Os in pre-naming dictionary and register signals with name_override --- migen/fhdl/namer.py | 12 +++++++++--- migen/fhdl/verilog.py | 4 ++-- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/migen/fhdl/namer.py b/migen/fhdl/namer.py index ff2a85d3..6a903662 100644 --- a/migen/fhdl/namer.py +++ b/migen/fhdl/namer.py @@ -122,10 +122,16 @@ def last_flagged(seq): a = b yield a, True -def build_pnd(signals): +def build_namespace(signals): sig_iters = [(signal, last_flagged(signal.backtrace)) - for signal in signals] - return _r_build_pnd(_StepNamer(), sig_iters) + for signal in signals if signal.name_override is None] + pnd = _r_build_pnd(_StepNamer(), sig_iters) + ns = Namespace(pnd) + # register signals with name_override + for signal in signals: + if signal.name_override is not None: + ns.get_name(signal) + return ns class Namespace: def __init__(self, pnd): diff --git a/migen/fhdl/verilog.py b/migen/fhdl/verilog.py index fe60d740..7f9ceb94 100644 --- a/migen/fhdl/verilog.py +++ b/migen/fhdl/verilog.py @@ -3,7 +3,7 @@ from functools import partial from migen.fhdl.structure import * from migen.fhdl.structure import _Operator, _Slice, _Assign, _StatementList from migen.fhdl.tools import * -from migen.fhdl.namer import Namespace, build_pnd +from migen.fhdl.namer import Namespace, build_namespace def _printsig(ns, s): if s.bv.signed: @@ -213,7 +213,7 @@ def convert(f, ios=set(), name="top", clk_signal=None, rst_signal=None, return_n if rst_signal is None: rst_signal = Signal(name_override="sys_rst") ios.add(rst_signal) - ns = Namespace(namer.build_pnd(list_signals(f))) + ns = build_namespace(list_signals(f) | ios) ios |= f.pads -- 2.30.2