From e5a7fb9ed7d2621b2270b0ee6a4b984bb4b7c8b5 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Alain=20P=C3=A9teut?= Date: Sun, 7 Jul 2019 23:36:32 +0200 Subject: [PATCH] vendor.xilinx_7series: generate also binary bitfile. Fixes #139. --- nmigen/vendor/xilinx_7series.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/nmigen/vendor/xilinx_7series.py b/nmigen/vendor/xilinx_7series.py index 3027070..193221a 100644 --- a/nmigen/vendor/xilinx_7series.py +++ b/nmigen/vendor/xilinx_7series.py @@ -42,7 +42,8 @@ class Xilinx7SeriesPlatform(TemplatedPlatform): * ``{{name}}_timing.rpt``: Vivado report. * ``{{name}}_power.rpt``: Vivado report. * ``{{name}}_route.dcp``: Vivado design checkpoint. - * ``{{name}}.bit``: binary bitstream. + * ``{{name}}.bit``: binary bitstream with metadata. + * ``{{name}}.bin``: binary bitstream. """ toolchain = "Vivado" @@ -92,7 +93,7 @@ class Xilinx7SeriesPlatform(TemplatedPlatform): report_timing_summary -datasheet -max_paths 10 -file {{name}}_timing.rpt report_power -file {{name}}_power.rpt {{get_override("script_before_bitstream")|default("# (script_before_bitstream placeholder)")}} - write_bitstream -force {{name}}.bit + write_bitstream -force -bin_file {{name}}.bit {{get_override("script_after_bitstream")|default("# (script_after_bitstream placeholder)")}} quit """, -- 2.30.2