From e5da59013ef804734da4c256ef39c8809f56c308 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 4 Jun 2022 13:16:23 +0100 Subject: [PATCH] --- openpower/sv/remap.mdwn | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn index aee1dc69d..3f02ebfda 100644 --- a/openpower/sv/remap.mdwn +++ b/openpower/sv/remap.mdwn @@ -46,11 +46,21 @@ helper instruction options which make REMAP easier to use. with this. both are expensive (copy large vectors, spill through memory) * REMAP **redefines** the order of access according to set "Schedules". * The Schedules are not necessarily restricted to power-of-two boundaries - making it unnecessary to have for exsmple specialised 3x4 transpose + making it unnecessary to have for example specialised 3x4 transpose instructions. Only the most commonly-used algorithms in computer science have REMAP -support, due to the high cost in both the ISA and in hardware. +support, due to the high cost in both the ISA and in hardware. For +general-purpose remapping the `Indexed` REMAP may be deployed. + +# Usage + +* `svshape` to set the type of reordering to be applied to the + usual `0..VL-1` hardware for-loop +* `svremap` to set which registers a given reordering is to apply to + (RA, RT etc) +* `sv.instruction` where any register marked as Vectorised will be + REMAPPED. # REMAP SPR @@ -77,7 +87,7 @@ instruction which matches the above SPR: |0 |6 |11 |13 |15 |17 |19 |21 | 22 |26 |31 | | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 | pst | rsvd | XO | / | -# SHAPE 1D/2D/3D vector-matrix remapping SPRs +# SHAPE Remapping SPRs There are four "shape" SPRs, SHAPE0-3, 32-bits in each, which have the same format. -- 2.30.2