From e657564359c300bde7bcbba12e30b5e3f80f8c6c Mon Sep 17 00:00:00 2001 From: Renlin Li Date: Mon, 12 Nov 2018 16:47:24 +0000 Subject: [PATCH] [PR87815]Don't generate shift sequence for load replacement in DSE when the mode size is not compile-time constant The patch adds a check if the gap is compile-time constant. This happens when dse decides to replace the load with previous store value. The problem is that, shift sequence could not accept compile-time non-constant mode operand. gcc/ 2018-11-12 Renlin Li PR target/87815 * dse.c (get_stored_val): Add check for compile-time constantness of gap. gcc/testsuite/ 2018-11-12 Renlin Li PR target/87815 * gcc.target/aarch64/sve/pr87815.c: New. From-SVN: r266033 --- gcc/ChangeLog | 6 ++++++ gcc/dse.c | 2 +- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/aarch64/sve/pr87815.c | 13 +++++++++++++ 4 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr87815.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 82da0eaadba..6b4a14b946b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2018-11-12 Renlin Li + + PR target/87815 + * dse.c (get_stored_val): Add check for compile-time constantness + of gap. + 2018-11-12 Sudakshina Das * config/arm/arm-cpus.in (armv8_5, sb, predres): New features. diff --git a/gcc/dse.c b/gcc/dse.c index cfebfa0e110..21d166d92fc 100644 --- a/gcc/dse.c +++ b/gcc/dse.c @@ -1841,7 +1841,7 @@ get_stored_val (store_info *store_info, machine_mode read_mode, else gap = read_offset - store_info->offset; - if (maybe_ne (gap, 0)) + if (gap.is_constant () && maybe_ne (gap, 0)) { poly_int64 shift = gap * BITS_PER_UNIT; poly_int64 access_size = GET_MODE_SIZE (read_mode) + gap; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ec4309b335b..64b072f2293 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-11-12 Renlin Li + + PR target/87815 + * gcc.target/aarch64/sve/pr87815.c: New. + 2018-11-12 Sudakshina Das * gcc.target/arm/multilib.exp: Add some -march=armv8.5-a diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr87815.c b/gcc/testsuite/gcc.target/aarch64/sve/pr87815.c new file mode 100644 index 00000000000..628cedb2acc --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/pr87815.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target aarch64_asm_sve_ok } } */ +/* { dg-options "-O3" } */ +int a, b, d; +short e; + +void f () +{ + for (int i = 0; i < 8; i++) + { + e = b >= 2 ?: a >> b; + d = e && b; + } +} -- 2.30.2