From e665e5806de0f9127a907223c9ba6a2ce8b5e596 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 1 May 2021 00:48:43 +0100 Subject: [PATCH] --- docs.mdwn | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/docs.mdwn b/docs.mdwn index 9d83092d7..1568b0e3e 100644 --- a/docs.mdwn +++ b/docs.mdwn @@ -10,12 +10,12 @@ intended as standalone projects useful outside of LibreSOC. For example, the IEE754 FPU repository is a general purpose IEEE754 toolkit for the construction of FSMs and arbitrary length pipelines. -| Git Repo | Documentation | Description -|----------|---------------|---------------| -| [SOC](https://git.libre-soc.org/?p=soc.git;a=tree) | [Libre-SOC](https://docs.libre-soc.org/soc/) | Main OpenPOWER Hybrid CPU-GPU | -| [FPU](https://git.libre-soc.org/?p=ieee754fpu.git;a=tree) | -- | Equivalent to hardfloat-3 | -| [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | -- | Equivalent to Chisel3.util | -| [OpenPOWER ISA](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [OpenPOWER ISA](https://docs.libre-soc.org/openpower-isa/) | Simulator, ISA spec compiler, co-simulation infrastructure | +| Git Repo | Documentation | Description | Pypi | +|----------|---------------|---------------|-------- +| [SOC](https://git.libre-soc.org/?p=soc.git;a=tree) | [Libre-SOC](https://docs.libre-soc.org/soc/) | Main OpenPOWER Hybrid CPU-GPU | | +| [FPU](https://git.libre-soc.org/?p=ieee754fpu.git;a=tree) | -- | Equivalent to hardfloat-3 | https://pypi.org/project/libresoc-ieee754fpu | +| [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | -- | Equivalent to Chisel3.util | https://pypi.org/project/libresoc-nmutil | +| [OpenPOWER ISA](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [OpenPOWER ISA](https://docs.libre-soc.org/openpower-isa/) | Simulator, ISA spec compiler, co-simulation infrastructure | https://pypi.org/project/libresoc-openpower-isa/ | Also see [[SOC Architecture|3d_gpu/architecture]] -- 2.30.2