From e6842652ba14a545d08286d23c43aa0f379314f8 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Fri, 11 Aug 2006 20:22:36 -0400 Subject: [PATCH] Adjusted the decoder a little. --HG-- extra : convert_revision : 5bdbe00342837ae4caacb3ad86c7becca36ba6ce --- src/arch/sparc/isa/decoder.isa | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa index 6173a36dd..0c2729833 100644 --- a/src/arch/sparc/isa/decoder.isa +++ b/src/arch/sparc/isa/decoder.isa @@ -117,15 +117,15 @@ decode OP default Unknown::unknown() 0x2: decode OP3 { format IntOp { 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); - 0x01: and({{Rd = Rs1.udw & Rs2_or_imm13;}}); - 0x02: or({{Rd = Rs1.udw | Rs2_or_imm13;}}); - 0x03: xor({{Rd = Rs1.udw ^ Rs2_or_imm13;}}); + 0x01: and({{Rd = Rs1.sdw & Rs2_or_imm13;}}); + 0x02: or({{Rd = Rs1.sdw | Rs2_or_imm13;}}); + 0x03: xor({{Rd = Rs1.sdw ^ Rs2_or_imm13;}}); 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); - 0x05: andn({{Rd = Rs1.udw & ~Rs2_or_imm13;}}); - 0x06: orn({{Rd = Rs1.udw | ~Rs2_or_imm13;}}); - 0x07: xnor({{Rd = ~(Rs1.udw ^ Rs2_or_imm13);}}); + 0x05: andn({{Rd = Rs1.sdw & ~Rs2_or_imm13;}}); + 0x06: orn({{Rd = Rs1.sdw | ~Rs2_or_imm13;}}); + 0x07: xnor({{Rd = ~(Rs1.sdw ^ Rs2_or_imm13);}}); 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}}); - 0x09: mulx({{Rd = Rs1 * Rs2_or_imm13;}}); + 0x09: mulx({{Rd = Rs1.sdw * Rs2_or_imm13;}}); 0x0A: umul({{ Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; Y = Rd<63:32>; -- 2.30.2