From e6b078d156f8690ab06d342da9be9af02cbcc3aa Mon Sep 17 00:00:00 2001
From: =?utf8?q?Marcelina=20Ko=C5=9Bcielnicka?= <mwk@0x04.net>
Date: Tue, 25 May 2021 18:49:17 +0200
Subject: [PATCH] opt_mem: Add reset/init value support.

---
 passes/opt/opt_mem.cc | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/passes/opt/opt_mem.cc b/passes/opt/opt_mem.cc
index 0409fb736..2788648ec 100644
--- a/passes/opt/opt_mem.cc
+++ b/passes/opt/opt_mem.cc
@@ -51,6 +51,8 @@ struct OptMemPass : public Pass {
 
 		int total_count = 0;
 		for (auto module : design->selected_modules()) {
+			SigMap sigmap(module);
+			FfInitVals initvals(&sigmap, module);
 			for (auto &mem : Mem::get_selected_memories(module)) {
 				bool changed = false;
 				for (auto &port : mem.wr_ports) {
@@ -65,6 +67,16 @@ struct OptMemPass : public Pass {
 				}
 
 				if (mem.wr_ports.empty() && mem.inits.empty()) {
+					// The whole memory array will contain
+					// only State::Sx, but the embedded read
+					// registers could have reset or init values.
+					// They will probably be optimized away by
+					// opt_dff later.
+					for (int i = 0; i < GetSize(mem.rd_ports); i++) {
+						mem.extract_rdff(i, &initvals);
+						auto &port = mem.rd_ports[i];
+						module->connect(port.data, Const(State::Sx, GetSize(port.data)));
+					}
 					mem.remove();
 					total_count++;
 				}
-- 
2.30.2