From e79c2bfb70fa322644f9775c1190bb61dcaae509 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 7 Dec 2021 00:03:10 +0000 Subject: [PATCH] debug print --- src/soc/experiment/dcache.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/experiment/dcache.py b/src/soc/experiment/dcache.py index 3460e976..25ccac59 100644 --- a/src/soc/experiment/dcache.py +++ b/src/soc/experiment/dcache.py @@ -160,6 +160,7 @@ TAG_RAM_WIDTH = TAG_WIDTH * NUM_WAYS print ("TAG_RAM_WIDTH", TAG_RAM_WIDTH) print (" TAG_WIDTH", TAG_WIDTH) print (" NUM_WAYS", NUM_WAYS) +print (" NUM_LINES", NUM_LINES) def CacheTagArray(): tag_layout = [('valid', NUM_WAYS), -- 2.30.2