From e7ebc07288f758c0440fc31e5cb5f6a3b5114fa7 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 16 Apr 2018 19:23:13 +0100 Subject: [PATCH] add SIMD comparison section --- simple_v_extension.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/simple_v_extension.mdwn b/simple_v_extension.mdwn index c19db7a05..d1b6dd20a 100644 --- a/simple_v_extension.mdwn +++ b/simple_v_extension.mdwn @@ -1119,7 +1119,7 @@ instruction decode) with minimum disruption and effort. RVV is extremely well-designed and has some amazing features, including 2D reorganisation of memory through LOAD/STORE "strides". -* plus: regular predictable workload means that implmentations may +* plus: regular predictable workload means that implementations may streamline effects on L1/L2 Cache. * plus: regular and clear parallel workload also means that lanes (similar to Alt-RVP) may be used as an implementation detail, -- 2.30.2