From e81df6a0efb1e66eca096e1950a8ebb6f2ad3571 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 23 May 2020 16:21:21 +0100 Subject: [PATCH] add stub DataMerger class --- src/soc/experiment/l0_cache.py | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/soc/experiment/l0_cache.py b/src/soc/experiment/l0_cache.py index 5dc6daae..ae26656b 100644 --- a/src/soc/experiment/l0_cache.py +++ b/src/soc/experiment/l0_cache.py @@ -127,6 +127,22 @@ class DualPortSplitter(Elaboratable): pass +# TODO: +class DataMerger(Elaboratable): + """DataMerger + + Merges data based on an address-match matrix + + """ + def __init__(self, array_size): + """ + :addr_array_i: an NxN Array of Signals with bits set indicating address match + :data_i: an Nx Array of Records {data: 128 bit, byte_enable: 16 bit} + :data_o: an Output Record of same type {data: 128 bit, byte_enable: 16 bit} + """ + pass + + class LDSTPort(Elaboratable): def __init__(self, idx, regwid=64, addrwid=48): self.pi = PortInterface("ldst_port%d" % idx, regwid, addrwid) -- 2.30.2