From e83ad8602b01f7966851d09348493c4980c4a954 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 9 Oct 2022 22:47:33 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls002.mdwn | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/openpower/sv/rfc/ls002.mdwn b/openpower/sv/rfc/ls002.mdwn index ba359a93c..67c83f629 100644 --- a/openpower/sv/rfc/ls002.mdwn +++ b/openpower/sv/rfc/ls002.mdwn @@ -164,17 +164,16 @@ Special registers altered: None An additional 16-bits of immediate is -inserted into `FRT` to extend its accuracy to -a full FP32, which is then stored in the usual FP64 Format within the FPR. +inserted into the low-order half of the single-format value +corresponding to the contents of FRT. + +**This instruction performs a Read-Modify-Write on FRT.** +In hardware, `fishmv` may be macro-op-fused with `fmvis`. -**This instruction performs a Read-Modify-Write.** *FRT is read, the -additional -16 bit immediate inserted, and the result also written to FRT. -This is strategically similar to how `li` combined with `oris` is -used to construct 32-bit Integers. -`fishmv` may be macro-op-fused with `fmvis`* Programmer's note: +The use of these two instructions is strategically similar to +how `li` combined with `oris` may be used to construct 32-bit Integers. If a prior `fmvis` instruction had been used to set the upper 16-bits from an FP32 value, `fishmv` may be used to set the -- 2.30.2