From e84e074248efca9f5445d353fae970c8f1240de5 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Thu, 14 Aug 2014 12:22:16 -0700 Subject: [PATCH] Revert "i965/vec4: Use MOV, not OR, to set URB write channel mask bits." This reverts commit af13cf609f4257768ad8b80be8cec7f2e6ca8c81, which appears to cause huge performance problems on Ivybridge. I'd missed that the FFTID bits are in the low byte. The documentation doesn't indicate that the URB write message header actually wants FFTID - it just labels those bits as "Reserved." But it appears necessary. This does slightly more than revert the original change: originally, Broadwell had separate code generation, which used MOV, and this patch only changed it for Gen4-7. Now that both are unified, reverting this also makes Broadwell use OR. Which should be fine. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_eu_emit.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 1a28a352933..65c06eccabd 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -2352,8 +2352,10 @@ void brw_urb_WRITE(struct brw_compile *p, brw_push_insn_state(p); brw_set_default_access_mode(p, BRW_ALIGN_1); brw_set_default_mask_control(p, BRW_MASK_DISABLE); - brw_MOV(p, get_element_ud(brw_message_reg(msg_reg_nr), 5), - brw_imm_ud(0xff00)); + brw_OR(p, retype(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, msg_reg_nr, 5), + BRW_REGISTER_TYPE_UD), + retype(brw_vec1_grf(0, 5), BRW_REGISTER_TYPE_UD), + brw_imm_ud(0xff00)); brw_pop_insn_state(p); } -- 2.30.2