From e8b42ce4f8a8c3f8f67ed0d040f95aa982fcf2ee Mon Sep 17 00:00:00 2001 From: Julian Brown Date: Wed, 5 Jul 2006 17:08:47 +0000 Subject: [PATCH] * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax. --- opcodes/ChangeLog | 4 ++++ opcodes/arm-dis.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b8eea112a86..5e5a7520fd3 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2006-07-05 Julian Brown + + * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax. + 2006-06-12 H.J. Lu * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 977fcf11dbd..a37557889b6 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -280,7 +280,7 @@ static const struct opcode32 coprocessor_opcodes[] = {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "fmrrd%c\t%12-15r, %16-19r, %z0"}, {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%16-19,0-3d"}, {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%16-19,0-3d"}, - {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%12-15r, %16-19r, %y4"}, + {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%y4, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "fmdrr%c\t%z0, %12-15r, %16-19r"}, {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "fmrrs%c\t%12-15r, %16-19r, %y4"}, {FPU_VFP_EXT_V1xD, 0x0e000a00, 0x0fb00f50, "fmacs%c\t%y1, %y2, %y0"}, -- 2.30.2