From e933331cd75d91449eda78edf3e830cd09ad9ee2 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 16 Feb 2017 03:43:50 +0000 Subject: [PATCH] radeonsi: use shared emit imsb code. MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Edward O'Callaghan Reviewed-by: Marek Olšák Signed-off-by: Dave Airlie --- .../drivers/radeonsi/si_shader_tgsi_alu.c | 28 ++----------------- 1 file changed, 3 insertions(+), 25 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c index 085fd5bd0f9..879deb136e3 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c @@ -586,32 +586,10 @@ static void emit_imsb(const struct lp_build_tgsi_action *action, struct lp_build_tgsi_context *bld_base, struct lp_build_emit_data *emit_data) { - struct gallivm_state *gallivm = bld_base->base.gallivm; - LLVMBuilderRef builder = gallivm->builder; - LLVMValueRef arg = emit_data->args[0]; - - LLVMValueRef msb = - lp_build_intrinsic(builder, "llvm.AMDGPU.flbit.i32", - emit_data->dst_type, &arg, 1, - LP_FUNC_ATTR_READNONE); - - /* The HW returns the last bit index from MSB, but TGSI wants - * the index from LSB. Invert it by doing "31 - msb". */ - msb = LLVMBuildSub(builder, lp_build_const_int32(gallivm, 31), - msb, ""); - - /* If arg == 0 || arg == -1 (0xffffffff), return -1. */ - LLVMValueRef all_ones = lp_build_const_int32(gallivm, -1); - - LLVMValueRef cond = - LLVMBuildOr(builder, - LLVMBuildICmp(builder, LLVMIntEQ, arg, - bld_base->uint_bld.zero, ""), - LLVMBuildICmp(builder, LLVMIntEQ, arg, - all_ones, ""), ""); - + struct si_shader_context *ctx = si_shader_context(bld_base); emit_data->output[emit_data->chan] = - LLVMBuildSelect(builder, cond, all_ones, msb, ""); + ac_emit_imsb(&ctx->ac, emit_data->args[0], + emit_data->dst_type); } static void emit_iabs(const struct lp_build_tgsi_action *action, -- 2.30.2