From e9344ab032239e29ac33f8ab8705331163656a8b Mon Sep 17 00:00:00 2001 From: bugzilla-daemon Date: Fri, 10 Apr 2020 17:27:19 +0000 Subject: [PATCH] [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen --- 77/b2930a13321747f345556ad2d19fc29da1ea1a | 71 +++++++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 77/b2930a13321747f345556ad2d19fc29da1ea1a diff --git a/77/b2930a13321747f345556ad2d19fc29da1ea1a b/77/b2930a13321747f345556ad2d19fc29da1ea1a new file mode 100644 index 0000000..d616226 --- /dev/null +++ b/77/b2930a13321747f345556ad2d19fc29da1ea1a @@ -0,0 +1,71 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Fri, 10 Apr 2020 18:27:22 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jMxR3-0005eC-C6; Fri, 10 Apr 2020 18:27:21 +0100 +Received: from localhost ([127.0.0.1] helo=bugs.libre-soc.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) id 1jMxR1-0005dz-4k + for libre-riscv-dev@lists.libre-riscv.org; Fri, 10 Apr 2020 18:27:19 +0100 +From: bugzilla-daemon@libre-soc.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Fri, 10 Apr 2020 17:27:19 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Source Code +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: programmerjake@gmail.com +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: cc +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: https://bugs.libre-soc.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 276] SR NAND Latch needed in nmigen +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cHM6Ly9idWdzLmxpYnJlLXNvYy5vcmcvc2hvd19idWcuY2dpP2lkPTI3NgoKSmFjb2IgTGlm +c2hheSA8cHJvZ3JhbW1lcmpha2VAZ21haWwuY29tPiBjaGFuZ2VkOgoKICAgICAgICAgICBXaGF0 +ICAgIHxSZW1vdmVkICAgICAgICAgICAgICAgICAgICAgfEFkZGVkCi0tLS0tLS0tLS0tLS0tLS0t +LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t +LS0KICAgICAgICAgICAgICAgICBDQ3wgICAgICAgICAgICAgICAgICAgICAgICAgICAgfHByb2dy +YW1tZXJqYWtlQGdtYWlsLmNvbQoKLS0tIENvbW1lbnQgIzE4IGZyb20gSmFjb2IgTGlmc2hheSA8 +cHJvZ3JhbW1lcmpha2VAZ21haWwuY29tPiAtLS0KKEluIHJlcGx5IHRvIHdoaXRlcXVhcmsgZnJv +bSBjb21tZW50ICMxNykKPiBDcmVhdGVkIGF0dGFjaG1lbnQgNTAgW2RldGFpbHNdCj4gU1IgbGF0 +Y2ggZGVtb25zdHJhdGlvbgoKRm9yIHNvbWUgcmVhc29uLCBidWd6aWxsYSBkb2Vzbid0IHNlbmQg +b3V0IG5vdGlmaWNhdGlvbnMgZm9yIGNyZWF0aW5nCmF0dGFjaG1lbnRzLgoKVGhhbmtzLCB3aGl0 +ZXF1YXJrLCBsb29rcyBnb29kIHRvIG1lIQoKLS0gCllvdSBhcmUgcmVjZWl2aW5nIHRoaXMgbWFp +bCBiZWNhdXNlOgpZb3UgYXJlIG9uIHRoZSBDQyBsaXN0IGZvciB0aGUgYnVnLgpfX19fX19fX19f +X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpsaWJyZS1yaXNjdi1kZXYgbWFp +bGluZyBsaXN0CmxpYnJlLXJpc2N2LWRldkBsaXN0cy5saWJyZS1yaXNjdi5vcmcKaHR0cDovL2xp +c3RzLmxpYnJlLXJpc2N2Lm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpYnJlLXJpc2N2LWRldgo= + -- 2.30.2