From e96191be588cec4963c24ae6627871516be0e2f8 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 31 Dec 2021 16:11:29 +0000 Subject: [PATCH] mention benefits of nmigen over MyHDL, ability to use full python OO --- README.md | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/README.md b/README.md index 401983a..5deda3d 100644 --- a/README.md +++ b/README.md @@ -55,9 +55,11 @@ The development of nMigen has been supported by [M-Labs][] and nMigen is *not* a "Python-to-FPGA" conventional high level synthesis (HLS) tool. It will *not* take a Python program as input and generate a hardware implementation of it. If you prefer this style of HLS, you may -wish to try [MyHDL](https://myhdl.org). In nMigen, the Python program is -executed by a regular Python interpreter, and it emits explicit statements -in the FHDL domain-specific language. Writing a conventional HLS tool, +wish to try [MyHDL](https://myhdl.org). In nMigen, the Python program +is executed by a regular Python interpreter, and it emits explicit +statements in the FHDL domain-specific language. Therefore, unlike MyHDL +(which is restricted to a subset of python), it is possible to use the +full OO power of python to create HDL. Writing a conventional HLS tool, similar to MyHDL, that uses nMigen as an internal component might be a good idea, on the other hand :) -- 2.30.2