From e9847f328b064ea6de127c3087e8041127aca3f7 Mon Sep 17 00:00:00 2001 From: Cesar Strauss Date: Sat, 20 Feb 2021 17:09:42 -0300 Subject: [PATCH] Assemble the SV64 prefix from its subfields using SVP64PrefixFields --- src/soc/decoder/isa/caller.py | 5 +++++ src/soc/sv/trans/svp64.py | 17 +++++++++-------- 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py index acdc57c3..b7f45ec0 100644 --- a/src/soc/decoder/isa/caller.py +++ b/src/soc/decoder/isa/caller.py @@ -264,6 +264,11 @@ class SVP64PrefixFields: self.rm = FieldSelectableInt(self.insn, rmfields) +SV64P_MAJOR_SIZE = len(SVP64PrefixFields().major.br) +SV64P_PID_SIZE = len(SVP64PrefixFields().pid.br) +SV64P_RM_SIZE = len(SVP64PrefixFields().rm.br) + + class SPR(dict): def __init__(self, dec2, initial_sprs={}): self.sd = dec2 diff --git a/src/soc/sv/trans/svp64.py b/src/soc/sv/trans/svp64.py index f52de2a0..e36b10a5 100644 --- a/src/soc/sv/trans/svp64.py +++ b/src/soc/sv/trans/svp64.py @@ -17,8 +17,11 @@ Bugtracker: https://bugs.libre-soc.org/show_bug.cgi?id=578 import os, sys from collections import OrderedDict +from soc.decoder.isa.caller import (SVP64PrefixFields, SV64P_MAJOR_SIZE, + SV64P_PID_SIZE, SV64P_RM_SIZE) from soc.decoder.pseudo.pagereader import ISA from soc.decoder.power_svp64 import SVP64RM, get_regtype, decode_extra +from soc.decoder.selectable_int import SelectableInt # decode GPR into sv extra @@ -538,17 +541,15 @@ class SVP64Asm: print (" smask 16-17:", bin(smask)) print () - # first construct the prefix: EXT001, bits 7/9=1, in MSB0 order - svp64_prefix = 0x1 << (31-5) # EXT001 - svp64_prefix |= 0x1 << (31-7) # SVP64 marker 1 - svp64_prefix |= 0x1 << (31-9) # SVP64 marker 2 - rmfields = [6, 8] + list(range(10,32)) # SVP64 24-bit RM - for i, x in enumerate(rmfields): - svp64_prefix |= ((svp64_rm>>(23-i))&0b1) << (31-x) + # first, construct the prefix from its subfields + svp64_prefix = SVP64PrefixFields() + svp64_prefix.major.eq(SelectableInt(0x1, SV64P_MAJOR_SIZE)) + svp64_prefix.pid.eq(SelectableInt(0b11, SV64P_PID_SIZE)) + svp64_prefix.rm.eq(SelectableInt(svp64_rm, SV64P_RM_SIZE)) # fiinally yield the svp64 prefix and the thingy. v3.0b opcode rc = '.' if rc_mode else '' - yield ".long 0x%x" % svp64_prefix + yield ".long 0x%x" % svp64_prefix.insn.value yield "%s %s" % (v30b_op+rc, ", ".join(v30b_newfields)) print ("new v3.0B fields", v30b_op, v30b_newfields) -- 2.30.2