From e993993f628bd5707e93e76ade3986352ebacf7e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 28 Jun 2019 10:47:48 +0100 Subject: [PATCH] printf wrong args --- riscv/processor.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv/processor.cc b/riscv/processor.cc index fcfdb6d..1b75e13 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -902,7 +902,7 @@ reg_t processor_t::get_csr(int which) case CSR_SV_CFG: return (state.sv().state_bank) | (state.sv().state_size<<3); case CSR_SV_STATE: - fprintf(stderr, "get CSR_SV_STATE vl %d mvl %d subvl %d\n", + fprintf(stderr, "get CSR_SV_STATE vl %ld mvl %ld subvl %ld\n", state.sv().vl, state.sv().mvl, state.sv().subvl); -- 2.30.2