From e9a4307dd6fa3e4a65038ab5c40f6b3a99f21be8 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 25 Apr 2021 11:46:50 +0100 Subject: [PATCH] move Signals in dcache to relevant context --- src/soc/experiment/dcache.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/soc/experiment/dcache.py b/src/soc/experiment/dcache.py index cd1946b7..943228f6 100644 --- a/src/soc/experiment/dcache.py +++ b/src/soc/experiment/dcache.py @@ -1203,8 +1203,6 @@ class DCache(Elaboratable): wb_in = self.wb_in req = MemAccessRequest("mreq_ds") - acks = Signal(3) - adjust_acks = Signal(3) req_row = Signal(ROW_BITS) req_idx = Signal(INDEX_BITS) @@ -1451,6 +1449,9 @@ class DCache(Elaboratable): with m.Case(State.STORE_WAIT_ACK): st_stbs_done = Signal() + acks = Signal(3) + adjust_acks = Signal(3) + comb += st_stbs_done.eq(~r1.wb.stb) comb += acks.eq(r1.acks_pending) -- 2.30.2