From e9ae35962d472e9e2bc3f936e217c795e585b9ab Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 11 Dec 2020 00:17:50 +0000 Subject: [PATCH] --- openpower/sv/av_opcodes.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/av_opcodes.mdwn b/openpower/sv/av_opcodes.mdwn index 9810b3490..0988d7257 100644 --- a/openpower/sv/av_opcodes.mdwn +++ b/openpower/sv/av_opcodes.mdwn @@ -121,7 +121,7 @@ There should be both a same-width multiply and a widening multiply. Signed and u For 8,16,32,64, resulting in 8,16,32,64,128. -*All of these can be done with SV elwidth overrides, as long as the dest is no greater than 128. SV specifically does not do 128 bit arithmetic. Specifying src elwidth=8 and dest elwidth=16 will give a widening multiply* +*All of these can be done with SV elwidth overrides, as long as the dest is no greater than 128. SV specifically does not do 128 bit arithmetic. Instead, vec2.X mul-lo followed by vec2.Y mul-hi can be macro-op fused to get at the full 128 bit internal result. Specifying e.g. src elwidth=8 and dest elwidth=16 will give a widening multiply* ## vec_rl - rotate left -- 2.30.2