From ea1b97714d9bd443c178ee43b19bf10f9a17d3d5 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sat, 19 Aug 2017 18:33:02 +0200 Subject: [PATCH] r600g: don't set up and don't call the fetch shader if there are no VS inputs --- src/gallium/drivers/r600/evergreen_state.c | 3 +++ src/gallium/drivers/r600/r600_shader.c | 2 +- src/gallium/drivers/r600/r600_state.c | 3 +++ 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 95953515ac2..764acfcad75 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -2298,6 +2298,9 @@ static void evergreen_emit_vertex_fetch_shader(struct r600_context *rctx, struct struct r600_cso_state *state = (struct r600_cso_state*)a; struct r600_fetch_shader *shader = (struct r600_fetch_shader*)state->cso; + if (!shader) + return; + radeon_set_context_reg(cs, R_0288A4_SQ_PGM_START_FS, (shader->buffer->gpu_address + shader->offset) >> 8); radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 2eb8187341c..8c5e6ff72d6 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -3031,7 +3031,7 @@ static int r600_shader_from_tgsi(struct r600_context *rctx, ctx.file_offset[i] = 0; } - if (ctx.type == PIPE_SHADER_VERTEX) { + if (ctx.type == PIPE_SHADER_VERTEX && ctx.info.num_inputs) { ctx.file_offset[TGSI_FILE_INPUT] = 1; r600_bytecode_add_cfinst(ctx.bc, CF_OP_CALL_FS); } diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index dca8fe5e5bc..300dbe8040c 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -1898,6 +1898,9 @@ static void r600_emit_vertex_fetch_shader(struct r600_context *rctx, struct r600 struct r600_cso_state *state = (struct r600_cso_state*)a; struct r600_fetch_shader *shader = (struct r600_fetch_shader*)state->cso; + if (!shader) + return; + radeon_set_context_reg(cs, R_028894_SQ_PGM_START_FS, shader->offset >> 8); radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, &rctx->b.gfx, shader->buffer, -- 2.30.2