From ea5132bc5ed20cc4ab16f2d8b23e0d16dc67dea1 Mon Sep 17 00:00:00 2001
From: Simon Cook <simon.cook@embecosm.com>
Date: Mon, 30 Sep 2013 08:23:48 +0000
Subject: [PATCH] barrel-shifter-1.c: New test.

2013-09-30  Simon Cook  <simon.cook@embecosm.com>
            Joern Rennecke  <joern.rennecke@embecosm.com>

        * gcc.target/arc/barrel-shifter-1.c: New test.
        * gcc.target/arc/barrel-shifter-2.c: Likewise.
        * gcc.target/arc/long-calls.c, gcc.target/arc/mA6.c: Likewise.
        * gcc.target/arc/mA7.c, gcc.target/arc/mARC600.c: Likewise.
        * gcc.target/arc/mARC601.c, gcc.target/arc/mARC700.c: Likewise.
        * gcc.target/arc/mcpu-arc600.c, gcc.target/arc/mcpu-arc601.c: Likewise.
        * gcc.target/arc/mcpu-arc700.c, gcc.target/arc/mcrc.c: Likewise.
        * gcc.target/arc/mdpfp.c, gcc.target/arc/mdsp-packa.c: Likewise.
        * gcc.target/arc/mdvbf.c, gcc.target/arc/mlock.c: Likewise.
        * gcc.target/arc/mmac-24.c, gcc.target/arc/mmac-d16.c: Likewise.
        * gcc.target/arc/mno-crc.c, gcc.target/arc/mno-dsp-packa.c: Likewise.
        * gcc.target/arc/mno-dvbf.c, gcc.target/arc/mno-lock.c: Likewise.
        * gcc.target/arc/mno-mac-24.c, gcc.target/arc/mno-mac-d16.c: Likewise.
        * gcc.target/arc/mno-rtsc.c, gcc.target/arc/mno-swape.c: Likewise.
        * gcc.target/arc/mno-xy.c, gcc.target/arc/mrtsc.c: Likewise.
        * gcc.target/arc/mspfp.c, gcc.target/arc/mswape.c: Likewise.
        * gcc.target/arc/mtune-ARC600.c: Likewise.
        * gcc.target/arc/mtune-ARC601.c: Likewise.
        * gcc.target/arc/mtune-ARC700-xmac: Likewise.
        * gcc.target/arc/mtune-ARC700.c: Likewise.
        * gcc.target/arc/mtune-ARC725D.c: Likewise.
        * gcc.target/arc/mtune-ARC750D.c: Likewise.
        * gcc.target/arc/mul64.c, gcc.target/arc/mxy.c: Likewise.
        * gcc.target/arc/no-dpfp-lrsr.c: Likewise.

Co-Authored-By: Joern Rennecke <joern.rennecke@embecosm.com>

From-SVN: r203025
---
 gcc/testsuite/ChangeLog                       | 28 +++++++++++++++++++
 .../gcc.target/arc/barrel-shifter-1.c         | 10 +++++++
 .../gcc.target/arc/barrel-shifter-2.c         |  9 ++++++
 gcc/testsuite/gcc.target/arc/long-calls.c     | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mA6.c            |  4 +++
 gcc/testsuite/gcc.target/arc/mA7.c            |  4 +++
 gcc/testsuite/gcc.target/arc/mARC600.c        |  4 +++
 gcc/testsuite/gcc.target/arc/mARC601.c        |  4 +++
 gcc/testsuite/gcc.target/arc/mARC700.c        |  4 +++
 gcc/testsuite/gcc.target/arc/mcpu-arc600.c    |  4 +++
 gcc/testsuite/gcc.target/arc/mcpu-arc601.c    |  4 +++
 gcc/testsuite/gcc.target/arc/mcpu-arc700.c    |  4 +++
 gcc/testsuite/gcc.target/arc/mcrc.c           |  9 ++++++
 gcc/testsuite/gcc.target/arc/mdpfp.c          | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mdsp-packa.c     |  9 ++++++
 gcc/testsuite/gcc.target/arc/mdvbf.c          |  9 ++++++
 gcc/testsuite/gcc.target/arc/mlock.c          | 12 ++++++++
 gcc/testsuite/gcc.target/arc/mmac-24.c        |  9 ++++++
 gcc/testsuite/gcc.target/arc/mmac-d16.c       |  9 ++++++
 gcc/testsuite/gcc.target/arc/mno-crc.c        | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mno-dsp-packa.c  | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mno-dvbf.c       | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mno-lock.c       | 14 ++++++++++
 gcc/testsuite/gcc.target/arc/mno-mac-24.c     | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mno-mac-d16.c    | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mno-rtsc.c       | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mno-swape.c      | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mno-xy.c         | 10 +++++++
 gcc/testsuite/gcc.target/arc/mrtsc.c          |  9 ++++++
 gcc/testsuite/gcc.target/arc/mspfp.c          | 11 ++++++++
 gcc/testsuite/gcc.target/arc/mswape.c         |  9 ++++++
 gcc/testsuite/gcc.target/arc/mtune-ARC600.c   |  4 +++
 gcc/testsuite/gcc.target/arc/mtune-ARC601.c   |  4 +++
 .../gcc.target/arc/mtune-ARC700-xmac          |  4 +++
 gcc/testsuite/gcc.target/arc/mtune-ARC700.c   |  4 +++
 gcc/testsuite/gcc.target/arc/mtune-ARC725D.c  |  4 +++
 gcc/testsuite/gcc.target/arc/mtune-ARC750D.c  |  4 +++
 gcc/testsuite/gcc.target/arc/mul64.c          | 13 +++++++++
 gcc/testsuite/gcc.target/arc/mxy.c            |  8 ++++++
 gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c   | 11 ++++++++
 40 files changed, 344 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
 create mode 100644 gcc/testsuite/gcc.target/arc/barrel-shifter-2.c
 create mode 100644 gcc/testsuite/gcc.target/arc/long-calls.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mA6.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mA7.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mARC600.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mARC601.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mARC700.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mcpu-arc600.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mcpu-arc601.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mcpu-arc700.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mcrc.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mdpfp.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mdsp-packa.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mdvbf.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mlock.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mmac-24.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mmac-d16.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mno-crc.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mno-dvbf.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mno-lock.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mno-mac-24.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mno-mac-d16.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mno-rtsc.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mno-swape.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mno-xy.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mrtsc.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mspfp.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mswape.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mtune-ARC600.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mtune-ARC601.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac
 create mode 100644 gcc/testsuite/gcc.target/arc/mtune-ARC700.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mtune-ARC725D.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mtune-ARC750D.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mul64.c
 create mode 100644 gcc/testsuite/gcc.target/arc/mxy.c
 create mode 100644 gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index e18391479f0..6d56fa61bfc 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,31 @@
+2013-09-30  Simon Cook  <simon.cook@embecosm.com>
+	    Joern Rennecke  <joern.rennecke@embecosm.com>
+
+	* gcc.target/arc/barrel-shifter-1.c: New test.
+	* gcc.target/arc/barrel-shifter-2.c: Likewise.
+	* gcc.target/arc/long-calls.c, gcc.target/arc/mA6.c: Likewise.
+	* gcc.target/arc/mA7.c, gcc.target/arc/mARC600.c: Likewise.
+	* gcc.target/arc/mARC601.c, gcc.target/arc/mARC700.c: Likewise.
+	* gcc.target/arc/mcpu-arc600.c, gcc.target/arc/mcpu-arc601.c: Likewise.
+	* gcc.target/arc/mcpu-arc700.c, gcc.target/arc/mcrc.c: Likewise.
+	* gcc.target/arc/mdpfp.c, gcc.target/arc/mdsp-packa.c: Likewise.
+	* gcc.target/arc/mdvbf.c, gcc.target/arc/mlock.c: Likewise.
+	* gcc.target/arc/mmac-24.c, gcc.target/arc/mmac-d16.c: Likewise.
+	* gcc.target/arc/mno-crc.c, gcc.target/arc/mno-dsp-packa.c: Likewise.
+	* gcc.target/arc/mno-dvbf.c, gcc.target/arc/mno-lock.c: Likewise.
+	* gcc.target/arc/mno-mac-24.c, gcc.target/arc/mno-mac-d16.c: Likewise.
+	* gcc.target/arc/mno-rtsc.c, gcc.target/arc/mno-swape.c: Likewise.
+	* gcc.target/arc/mno-xy.c, gcc.target/arc/mrtsc.c: Likewise.
+	* gcc.target/arc/mspfp.c, gcc.target/arc/mswape.c: Likewise.
+	* gcc.target/arc/mtune-ARC600.c: Likewise.
+	* gcc.target/arc/mtune-ARC601.c: Likewise.
+	* gcc.target/arc/mtune-ARC700-xmac: Likewise.
+	* gcc.target/arc/mtune-ARC700.c: Likewise.
+	* gcc.target/arc/mtune-ARC725D.c: Likewise.
+	* gcc.target/arc/mtune-ARC750D.c: Likewise.
+	* gcc.target/arc/mul64.c, gcc.target/arc/mxy.c: Likewise.
+	* gcc.target/arc/no-dpfp-lrsr.c: Likewise.
+
 2013-09-30  Richard Biener  <rguenther@suse.de>
 
 	PR middle-end/58532
diff --git a/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c b/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
new file mode 100644
index 00000000000..a0eb6d70c39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/barrel-shifter-1.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=ARC601 -mbarrel-shifter" } */
+int i;
+
+int f (void)
+{
+  i >>= 2;
+}
+
+/* { dg-final { scan-assembler "asr_s" } } */
diff --git a/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c b/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c
new file mode 100644
index 00000000000..97998fbf1a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/barrel-shifter-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+int i;
+
+int f (void)
+{
+  i >>= 2;
+}
+
+/* { dg-final { scan-assembler "asr_s" } } */
diff --git a/gcc/testsuite/gcc.target/arc/long-calls.c b/gcc/testsuite/gcc.target/arc/long-calls.c
new file mode 100644
index 00000000000..63fafbcc674
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/long-calls.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mlong-calls" } */
+
+int g (void);
+
+int f (void)
+{
+        g();
+}
+
+/* { dg-final { scan-assembler "j @g" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mA6.c b/gcc/testsuite/gcc.target/arc/mA6.c
new file mode 100644
index 00000000000..2e15a86f8a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mA6.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mA6" } */
+
+/* { dg-final { scan-assembler ".cpu ARC600" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mA7.c b/gcc/testsuite/gcc.target/arc/mA7.c
new file mode 100644
index 00000000000..c4430f43b41
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mA7.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mA7" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mARC600.c b/gcc/testsuite/gcc.target/arc/mARC600.c
new file mode 100644
index 00000000000..20e086aa754
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mARC600.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mARC600" } */
+
+/* { dg-final { scan-assembler ".cpu ARC600" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mARC601.c b/gcc/testsuite/gcc.target/arc/mARC601.c
new file mode 100644
index 00000000000..1d30da4cafb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mARC601.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mARC601" } */
+
+/* { dg-final { scan-assembler ".cpu ARC601" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mARC700.c b/gcc/testsuite/gcc.target/arc/mARC700.c
new file mode 100644
index 00000000000..43e9baa3f30
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mARC700.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mARC700" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc600.c b/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
new file mode 100644
index 00000000000..4c915fda0e3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mcpu-arc600.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ARC600" } */
+
+/* { dg-final { scan-assembler ".cpu ARC600" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc601.c b/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
new file mode 100644
index 00000000000..7c93c9dc4ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mcpu-arc601.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ARC601" } */
+
+/* { dg-final { scan-assembler ".cpu ARC601" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mcpu-arc700.c b/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
new file mode 100644
index 00000000000..c805a5af76b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mcpu-arc700.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=ARC700" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mcrc.c b/gcc/testsuite/gcc.target/arc/mcrc.c
new file mode 100644
index 00000000000..d3780bb00d6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mcrc.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mcrc" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mdpfp.c b/gcc/testsuite/gcc.target/arc/mdpfp.c
new file mode 100644
index 00000000000..4bbc9057b85
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mdpfp.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mdpfp" } */
+
+double i;
+
+int f (void)
+{
+        i *= 2.0;
+}
+
+/* { dg-final { scan-assembler "daddh" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mdsp-packa.c b/gcc/testsuite/gcc.target/arc/mdsp-packa.c
new file mode 100644
index 00000000000..f013a6dd1ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mdsp-packa.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mdsp-packa" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mdvbf.c b/gcc/testsuite/gcc.target/arc/mdvbf.c
new file mode 100644
index 00000000000..e2e545e8bb3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mdvbf.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mdvbf" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mlock.c b/gcc/testsuite/gcc.target/arc/mlock.c
new file mode 100644
index 00000000000..3a8b050c30e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mlock.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-mlock" } */
+/* { dg-do assemble } */
+
+int f (void *p)
+{
+  int i;
+
+  __asm__("llock %0, [%1]\n\t"
+	  "scond %0, [%1]" : "=&r"(i) : "r"(p));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mmac-24.c b/gcc/testsuite/gcc.target/arc/mmac-24.c
new file mode 100644
index 00000000000..30cb6981a03
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mmac-24.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mmac-24" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mmac-d16.c b/gcc/testsuite/gcc.target/arc/mmac-d16.c
new file mode 100644
index 00000000000..0570011fd26
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mmac-d16.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mmac-d16" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-crc.c b/gcc/testsuite/gcc.target/arc/mno-crc.c
new file mode 100644
index 00000000000..70ab9c11761
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-crc.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-crc" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("crc %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c b/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
new file mode 100644
index 00000000000..eb21522af06
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-dsp-packa.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-dsp-packa" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("minidl %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-dvbf.c b/gcc/testsuite/gcc.target/arc/mno-dvbf.c
new file mode 100644
index 00000000000..ea96d987c18
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-dvbf.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-dvbf" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("vbfdw %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-lock.c b/gcc/testsuite/gcc.target/arc/mno-lock.c
new file mode 100644
index 00000000000..62ac885ba99
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-lock.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-lock" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (void *p)
+{
+  int i;
+
+  __asm__("llock %0, [%1]\n\t"
+	  "scond %0, [%1]" : "=&r"(i) : "r"(p));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-mac-24.c b/gcc/testsuite/gcc.target/arc/mno-mac-24.c
new file mode 100644
index 00000000000..b4839579b12
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-mac-24.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-mac-24" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("mult %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-mac-d16.c b/gcc/testsuite/gcc.target/arc/mno-mac-d16.c
new file mode 100644
index 00000000000..68a20f4f55a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-mac-d16.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-mac-d16" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("muldw %1, %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-rtsc.c b/gcc/testsuite/gcc.target/arc/mno-rtsc.c
new file mode 100644
index 00000000000..d74a60e9351
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-rtsc.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-rtsc" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("rtsc %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-swape.c b/gcc/testsuite/gcc.target/arc/mno-swape.c
new file mode 100644
index 00000000000..c853ab4bdcc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-swape.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-swape" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+int f (int i)
+{
+  __asm__("swape %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mno-xy.c b/gcc/testsuite/gcc.target/arc/mno-xy.c
new file mode 100644
index 00000000000..e378b3fc9b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mno-xy.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-xy" } */
+/* Would also like to assemble and check that we get the expected
+   "Error: bad instruction" assembler messages, but at the moment our
+   testharness can't do that.  */
+
+void f (int i)
+{
+  __asm__("add x0_u0, x0_u0, %0" : :  "r" (i));
+}
diff --git a/gcc/testsuite/gcc.target/arc/mrtsc.c b/gcc/testsuite/gcc.target/arc/mrtsc.c
new file mode 100644
index 00000000000..31852a5e479
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mrtsc.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mrtsc" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("rtsc %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mspfp.c b/gcc/testsuite/gcc.target/arc/mspfp.c
new file mode 100644
index 00000000000..0e41ff89d35
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mspfp.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mspfp" } */
+
+float i;
+
+int f (void)
+{
+        i *= 2.0;
+}
+
+/* { dg-final { scan-assembler "fadd" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mswape.c b/gcc/testsuite/gcc.target/arc/mswape.c
new file mode 100644
index 00000000000..692e6a2bb6e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mswape.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mswape" } */
+/* { dg-do assemble } */
+
+int f (int i)
+{
+  __asm__("swape %1, %1" : "=r"(i) : "r"(i));
+  return i;
+}
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC600.c b/gcc/testsuite/gcc.target/arc/mtune-ARC600.c
new file mode 100644
index 00000000000..a483d1435ca
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC600.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC600" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC601.c b/gcc/testsuite/gcc.target/arc/mtune-ARC601.c
new file mode 100644
index 00000000000..ed57bd7092d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC601.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC601" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac b/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac
new file mode 100644
index 00000000000..2f1e137be4d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC700-xmac
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC700-xmac" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC700.c b/gcc/testsuite/gcc.target/arc/mtune-ARC700.c
new file mode 100644
index 00000000000..851ea7305e0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC700.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC700" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c b/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c
new file mode 100644
index 00000000000..e2aa4846291
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC725D.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC725D" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c b/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c
new file mode 100644
index 00000000000..20923300ee1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mtune-ARC750D.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-mtune=ARC750D" } */
+
+/* { dg-final { scan-assembler ".cpu ARC700" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mul64.c b/gcc/testsuite/gcc.target/arc/mul64.c
new file mode 100644
index 00000000000..3678b2799d5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mul64.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=ARC600 -mmul64" } */
+#include <stdint.h>
+
+int64_t i;
+int j, k;
+
+int f (void)
+{
+        i = j * k;
+}
+
+/* { dg-final { scan-assembler "mul64" } } */
diff --git a/gcc/testsuite/gcc.target/arc/mxy.c b/gcc/testsuite/gcc.target/arc/mxy.c
new file mode 100644
index 00000000000..1ecc34d2bdb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/mxy.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mxy" } */
+/* { dg-do assemble } */
+
+void f (int i)
+{
+  __asm__("add x0_u0, x0_u0, %0" : :  "r" (i));
+}
diff --git a/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c b/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
new file mode 100644
index 00000000000..e4e23e4a40f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arc/no-dpfp-lrsr.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mdpfp -mno-dpfp-lrsr" } */
+
+double i;
+
+int f (void)
+{
+        i *= 2.0;
+}
+
+/* { dg-final { scan-assembler-not "\tlr" } } */
-- 
2.30.2