From ea991619177aef1e60070293f4cf6d6dfd18c864 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 21 Aug 2022 18:33:42 +0100 Subject: [PATCH] --- openpower/sv/cr_ops.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn index 7b0187d1c..74b02f863 100644 --- a/openpower/sv/cr_ops.mdwn +++ b/openpower/sv/cr_ops.mdwn @@ -73,7 +73,7 @@ the main result. SVP64 RM `MODE` (includes `ELWIDTH_SRC` bits) for CR-based operations: | 6 | 7 | 19-20 | 21 | 22 23 | description | -| - | - | ----- | --- |---------|----------------- | +| - | - |-------| --- |---------|----------------- | |sz |SNZ| 0 RG | 0 | dz / | normal mode | |sz |SNZ| 0 RG | 1 | 0 / | scalar reduce mode (mapreduce), SUBVL=1 | |zz |SNZ| 0 RG | 1 | 1 / | parallel reduce mode (mapreduce), SUBVL=1 | -- 2.30.2