From eac97c91da74acb602c580b36415ab4c6b08b582 Mon Sep 17 00:00:00 2001 From: Giacomo Travaglini Date: Mon, 20 Nov 2017 17:02:11 +0000 Subject: [PATCH] arch-arm: HVC instruction undefined in secure EL1 Since EL2 is not available in secure mode, any HVC call from secure mode should be treated as undefined. This behaviour was implemented in aarch32 HVC but not in 64 bit version Change-Id: Ibaa4d8b1e8fe01d2ba3ef07494c09a4d3e7e87b0 Signed-off-by: Giacomo Travaglini Reviewed-by: Andreas Sandberg Reviewed-on: https://gem5-review.googlesource.com/5921 Maintainer: Andreas Sandberg --- src/arch/arm/isa/insts/misc64.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa index 58f08f51e..00724c095 100644 --- a/src/arch/arm/isa/insts/misc64.isa +++ b/src/arch/arm/isa/insts/misc64.isa @@ -53,7 +53,7 @@ let {{ SCR scr = Scr64; if (!ArmSystem::haveVirtualization(xc->tcBase()) || - (ArmSystem::haveSecurity(xc->tcBase()) && !scr.hce)) { + (ArmSystem::haveSecurity(xc->tcBase()) && (!scr.ns || !scr.hce))) { fault = disabledFault(); } else { fault = std::make_shared(machInst, bits(machInst, 20, 5)); -- 2.30.2