From eae61d61e97dee34d0d8433eddc1d69dd5579b9c Mon Sep 17 00:00:00 2001 From: Cooper Qu Date: Mon, 12 Oct 2020 22:31:14 +0800 Subject: [PATCH] CSKY: Change plsl.u16 to plsl.16. gas/ * testsuite/gas/csky/enhance_dsp.s : Change plsl.u16 to plsl.16. * testsuite/gas/csky/enhance_dsp.d : Change plsl.u16 to plsl.16. opcodes/ * csky-opc.h (csky_v2_opcodes): Change plsl.u16 to plsl.16. Change-Id: Ifb43573192e215527355f6541365b9f6a8ec80a4 --- gas/ChangeLog | 5 +++++ gas/testsuite/gas/csky/enhance_dsp.d | 2 +- gas/testsuite/gas/csky/enhance_dsp.s | 2 +- opcodes/ChangeLog | 4 ++++ opcodes/csky-opc.h | 2 +- 5 files changed, 12 insertions(+), 3 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index c7133d7b3a2..2cf7e54a010 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2020-10-26 Cooper Qu + + * testsuite/gas/csky/enhance_dsp.s : Change plsl.u16 to plsl.16. + * testsuite/gas/csky/enhance_dsp.d : Change plsl.u16 to plsl.16. + 2020-10-26 Cooper Qu * config/tc-csky.c (md_begin): Add version flag in eflag. diff --git a/gas/testsuite/gas/csky/enhance_dsp.d b/gas/testsuite/gas/csky/enhance_dsp.d index 17b33eaecb0..5733fc6c197 100644 --- a/gas/testsuite/gas/csky/enhance_dsp.d +++ b/gas/testsuite/gas/csky/enhance_dsp.d @@ -110,7 +110,7 @@ Disassembly of section \.text: \s*[0-9a-f]*:\s*f8e3d302\s*plsri\.u16\.r\s*r2,\s*r3,\s*8 \s*[0-9a-f]*:\s*f883d342\s*plsr\.u16\.r\s*r2,\s*r3,\s*r4 \s*[0-9a-f]*:\s*f8e3d402\s*plsli\.16\s*r2,\s*r3,\s*8 -\s*[0-9a-f]*:\s*fa03d442\s*plsl\.u16\s*r2,\s*r3,\s*r16 +\s*[0-9a-f]*:\s*fa03d442\s*plsl\.16\s*r2,\s*r3,\s*r16 \s*[0-9a-f]*:\s*f8e3d502\s*plsli\.u16\.s\s*r2,\s*r3,\s*8 \s*[0-9a-f]*:\s*f8e3d582\s*plsli\.s16\.s\s*r2,\s*r3,\s*8 \s*[0-9a-f]*:\s*f883d542\s*plsl\.u16\.s\s*r2,\s*r3,\s*r4 diff --git a/gas/testsuite/gas/csky/enhance_dsp.s b/gas/testsuite/gas/csky/enhance_dsp.s index 32772e27097..4081a28869d 100644 --- a/gas/testsuite/gas/csky/enhance_dsp.s +++ b/gas/testsuite/gas/csky/enhance_dsp.s @@ -110,7 +110,7 @@ hello: plsri.u16.r r2, r3, 8 plsr.u16.r r2, r3, r4 plsli.16 r2, r3, 8 - plsl.u16 r2, r3, r16 + plsl.16 r2, r3, r16 plsli.u16.s r2, r3, 8 plsli.s16.s r2, r3, 8 plsl.u16.s r2, r3, r4 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5851a641e77..94659f4c385 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2020-10-26 Cooper Qu + + * csky-opc.h (csky_v2_opcodes): Change plsl.u16 to plsl.16. + 2020-10-26 Cooper Qu * csky-dis.c (csky_output_operand): Add handler for diff --git a/opcodes/csky-opc.h b/opcodes/csky-opc.h index e309253a18c..fd84fd99e5a 100644 --- a/opcodes/csky-opc.h +++ b/opcodes/csky-opc.h @@ -5782,7 +5782,7 @@ const struct csky_opcode csky_v2_opcodes[] = (16_20, AREG, OPRND_SHIFT_0_BIT), (21_25, OIMM4b, OPRND_SHIFT_0_BIT)), CSKY_ISA_DSP_ENHANCE), - OP32 ("plsl.u16", + OP32 ("plsl.16", OPCODE_INFO3 (0xf800d440, (0_4, AREG, OPRND_SHIFT_0_BIT), (16_20, AREG, OPRND_SHIFT_0_BIT), -- 2.30.2