From eb7058ce96fa1d3d93c127cb3dfd53e96e961877 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 21 Apr 2005 19:58:20 +0000 Subject: [PATCH] * gcc.target/mips/branch-1.c: New test. From-SVN: r98522 --- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.target/mips/branch-1.c | 11 +++++++++++ 2 files changed, 15 insertions(+) create mode 100644 gcc/testsuite/gcc.target/mips/branch-1.c diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index be6cb82758f..35e33cb6cea 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2005-04-21 Richard Sandiford + + * gcc.target/mips/branch-1.c: New test. + 2005-04-21 Richard Henderson * gcc.dg/vect/vect-85.c: Don't xfail on alpha. diff --git a/gcc/testsuite/gcc.target/mips/branch-1.c b/gcc/testsuite/gcc.target/mips/branch-1.c new file mode 100644 index 00000000000..6b86dc04c2c --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/branch-1.c @@ -0,0 +1,11 @@ +/* We should implement these "if" statements using an "andi" instruction + followed by a branch on zero. */ +/* { dg-mips-options "-O2 -mno-mips16" } */ +void bar (void); +void f1 (int x) { if (x & 4) bar (); } +void f2 (int x) { if ((x >> 2) & 1) bar (); } +void f3 (unsigned int x) { if (x & 0x10) bar (); } +void f4 (unsigned int x) { if ((x >> 4) & 1) bar (); } +/* { dg-final { scan-assembler "\tandi\t.*\tandi\t.*\tandi\t.*\tandi\t" } } */ +/* { dg-final { scan-assembler-not "\tsrl\t" } } */ +/* { dg-final { scan-assembler-not "\tsra\t" } } */ -- 2.30.2