From eb778327b35c41855e00b069fe8ad24d1fed9565 Mon Sep 17 00:00:00 2001 From: Boris Shingarov Date: Sun, 8 Nov 2020 13:42:47 -0500 Subject: [PATCH] arch-power: Implement mcrxr Implement the mcrxr instruction (Move to Condition Register from XER X-form) as defined on p.132 of the green-cloth book: The contents of XER<0:3> are copied into the Condition Register field designated by BF. XER<0:3> are set to zero. Change-Id: I82ae3d98e1eaf9182e90c0c86afe0f13d4a052e4 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/37295 Reviewed-by: Gabe Black Reviewed-by: Boris Shingarov Maintainer: Gabe Black Tested-by: kokoro --- src/arch/power/isa/decoder.isa | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa index 475ddcc00..f32861b0f 100644 --- a/src/arch/power/isa/decoder.isa +++ b/src/arch/power/isa/decoder.isa @@ -278,6 +278,10 @@ decode OPCODE default Unknown::unknown() { 0x100: mtlr({{ LR = Rs; }}); 0x120: mtctr({{ CTR = Rs; }}); } + 512: mcrxr({{ + CR = insertCRField(CR, BF, XER<31:28>); + XER = XER<27:0>; + }}); } // All loads with an index register. The non-update versions -- 2.30.2