From ebd0f8f9ef7243bc42163baf87f0096e13936253 Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Fri, 27 Oct 2023 11:41:40 +0100 Subject: [PATCH] added english language description for ldbrsx instruction --- openpower/isa/fixedloadshift.mdwn | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn index fd9e31f2..54ee8bd2 100644 --- a/openpower/isa/fixedloadshift.mdwn +++ b/openpower/isa/fixedloadshift.mdwn @@ -406,6 +406,25 @@ Pseudo-code: || load_data[24:31] || load_data[16:23] || load_data[8:15] || load_data[0:7]) +Description: + + Let the effective address (EA) be the sum of the contents of + register RB shifted by (SH+1), and (RA|0). + + Bits 0:7 of the doubleword in storage addressed by EA + are loaded into RT[56:63]. Bits 8:15 of the doubleword in + storage addressed by EA are loaded into RT[48:55]. Bits + 16:23 of the doubleword in storage addressed by EA + are loaded into RT[40:47]. Bits 24:31 of the doubleword in + storage addressed by EA are loaded into RT 32:39. Bits + 32:39 of the doubleword in storage addressed by EA + are loaded into RT[24:31]. Bits 40:47 of the doubleword in + storage addressed by EA are loaded into RT[16:23]. Bits + 48:55 of the doubleword in storage addressed by EA + are loaded into RT[8:15]. Bits 56:63 of the doubleword in + storage addressed by EA are loaded into RT[0:7]. + + Special Registers Altered: None -- 2.30.2