From ec05242c27754224c8dd5d8c60828a0b43ef8f4c Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sun, 15 Feb 2015 00:20:05 +0100 Subject: [PATCH] Smaller default parameters in $mem simlib model --- techlibs/common/simlib.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v index ee024051b..bc343c62d 100644 --- a/techlibs/common/simlib.v +++ b/techlibs/common/simlib.v @@ -1539,9 +1539,9 @@ endmodule module \$mem (RD_CLK, RD_ADDR, RD_DATA, WR_CLK, WR_EN, WR_ADDR, WR_DATA); parameter MEMID = ""; -parameter SIZE = 256; +parameter SIZE = 4; parameter OFFSET = 0; -parameter ABITS = 8; +parameter ABITS = 2; parameter WIDTH = 8; parameter signed INIT = 1'bx; -- 2.30.2