From ec1421375af785985383963601d6b5c6ec8bc2f9 Mon Sep 17 00:00:00 2001 From: bugzilla-daemon Date: Tue, 12 May 2020 12:13:06 +0000 Subject: [PATCH] [libre-riscv-dev] [Bug 304] Define minimum viable interface set for 180nm ASIC --- 48/d446d634c0854d3265993abe4bc96c6468f32e | 77 +++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 48/d446d634c0854d3265993abe4bc96c6468f32e diff --git a/48/d446d634c0854d3265993abe4bc96c6468f32e b/48/d446d634c0854d3265993abe4bc96c6468f32e new file mode 100644 index 0000000..52f9333 --- /dev/null +++ b/48/d446d634c0854d3265993abe4bc96c6468f32e @@ -0,0 +1,77 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Tue, 12 May 2020 13:13:08 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jYTmW-0002Lk-54; Tue, 12 May 2020 13:13:08 +0100 +Received: from localhost ([127.0.0.1] helo=bugs.libre-soc.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) id 1jYTmT-0002LP-RI + for libre-riscv-dev@lists.libre-riscv.org; Tue, 12 May 2020 13:13:05 +0100 +From: bugzilla-daemon@libre-soc.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Tue, 12 May 2020 12:13:06 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Source Code +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: lkcl@lkcl.net +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: https://bugs.libre-soc.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 304] Define minimum viable interface set for + 180nm ASIC +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cHM6Ly9idWdzLmxpYnJlLXNvYy5vcmcvc2hvd19idWcuY2dpP2lkPTMwNAoKLS0tIENvbW1l +bnQgIzQgZnJvbSBMdWtlIEtlbm5ldGggQ2Fzc29uIExlaWdodG9uIDxsa2NsQGxrY2wubmV0PiAt +LS0KeWVob3dzaHVhIGkgYWRkZWQgYSBzdHViL3N0YXJ0aW5nLXBvaW50IGxzMTgwCgpodHRwczov +L2dpdC5saWJyZS1zb2Mub3JnLz9wPXBpbm11eC5naXQ7YT1ibG9iO2Y9c3JjL3NwZWMvbHMxODAu +cHk7aD03N2M1ZjFmN2Y3OTIzY2I4MjkyNDk5YmFjMTg5ZmYxY2U4ZjNiNmZmO2hiPWFjYTZkNjhh +NjE1OTEzNmZlMWYzNmM2NDMwZTJmZmQwN2RhMTNlOGMKCmFsc28gYWRkZWQgYSBzdHViIC8gZHVt +bXkgTFBDIGZ1bmN0aW9uOgpodHRwczovL2dpdC5saWJyZS1zb2Mub3JnLz9wPXBpbm11eC5naXQ7 +YT1ibG9iO2Y9c3JjL3NwZWMvcGluZnVuY3Rpb25zLnB5O2g9ZTQ2YmU4ZDExNGYwMGJiZjU3MTA5 +MmM0ZTdhOWVjNWVjZTM5ZDA0YjtoYj1hY2E2ZDY4YTYxNTkxMzZmZTFmMzZjNjQzMGUyZmZkMDdk +YTEzZThjI2w1MgoKaXQgd2lsbCBuZWVkIGl0cyBwaW4gbmFtaW5nIGNvcnJlY3RpbmcsIGFuZCBh +bHNvIGluIGxzMTgwLnB5IGV2ZXJ5dGhpbmcKaW5jbHVkaW5nIExQQyBtb3ZpbmcgdG8gYSBzaW5n +bGUgY29sdW1uLgoKd2UgbmVlZCB0byBtb3ZlIHF1aWNrbHkgb24gdGhpcyBiZWNhdXNlIFJ1ZGkg +aXMgd2FpdGluZyBmb3IgdXMKdG8gY29tbXVuaWNhdGUgYmFjayB0byBoaW0gdGhlIHJlcXVpcmVk +IHBlcmlwaGVyYWwgc2V0LCBhbmQgaGUKaXMgZXhwZXJpZW5jZWQgZW5vdWdoIHRvIGtub3cgdGhh +dCB3ZSBhcmUgd2VsbCBiZXlvbmQgdGhlIGluZHVzdHJ5CnN0YW5kYXJkIHRpbWUgZm9yIG1ha2lu +ZyB0aGVzZSBkZWNpc2lvbnMuCgotLSAKWW91IGFyZSByZWNlaXZpbmcgdGhpcyBtYWlsIGJlY2F1 +c2U6CllvdSBhcmUgb24gdGhlIENDIGxpc3QgZm9yIHRoZSBidWcuCl9fX19fX19fX19fX19fX19f +X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpYnJlLXJpc2N2LWRldiBtYWlsaW5nIGxp +c3QKbGlicmUtcmlzY3YtZGV2QGxpc3RzLmxpYnJlLXJpc2N2Lm9yZwpodHRwOi8vbGlzdHMubGli +cmUtcmlzY3Yub3JnL21haWxtYW4vbGlzdGluZm8vbGlicmUtcmlzY3YtZGV2Cg== + -- 2.30.2