From ecf23bb1b26a8a8f5e027fc1cf7ebc4ad2164a4a Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 16 Sep 2022 10:07:44 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index 17618fef0..96ea5d1c3 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -671,7 +671,7 @@ SVP64 then becomes: | 0-5 | 6 | 7 | 8-31 | 32-3 | Description | |-----|---|---|-------|------|---------------------------| | PO | 0 | 0 | !zero | 0b11 | SVP64Single:EXT248-263, or `RESERVED3` | -| PO | 0 | 0 | 0000 | 0b11 | EXT248-263 or `RESERVED2` | +| PO | 0 | 0 | 0000 | 0b11 | Scalar EXT248-263 | | PO | 0 | 1 | nnnn | 0b11 | SVP64:EXT248-263 | | PO | 1 | 0 | !zero | nn | SVP64Single:EXT000-063 or `RESERVED4` | | PO | 1 | 1 | nnnn | nn | SVP64:EXT000-063 | @@ -681,9 +681,9 @@ and reserved areas, QTY 1of 30-bit and QTY 3of 55-bit, are: | 0-5 | 6 | 7 | 8-31 | 32-3 | Description | |-----|---|---|-------|------|---------------------------| | PO | 0 | 0 | 0000 | 0b11 | `RESERVED1` or EXT300-363 | -| PO9?| 0 | x | xxxx | 0b01 | RESERVED (other) | -| PO9?| 0 | x | xxxx | 0b10 | RESERVED (other) | -| PO9?| 0 | x | xxxx | 0b00 | RESERVED (other) | +| PO9?| 0 | x | xxxx | 0b00 | `RESERVED2` or EXT200-216 | +| PO9?| 0 | x | xxxx | 0b01 | `RESERVED2` or EXT216-231 | +| PO9?| 0 | x | xxxx | 0b10 | `RESERVED2` or EXT232-247 | with additional potentially QTY 3of 30-bit reserved areas (part of Scalar Unvectoriseable EXT200-247): @@ -698,15 +698,14 @@ Where: * SVP64Single (`RESERVED3/4`) is *planned* for a future RFC (but needs reserving as part of this RFC) -* `RESERVED1` is available for general-purpose **never**-Simple-V - 32-bit encodings -* RESERVED2 is for "new" Scalar instructions (designated EXT248-263) +* `RESERVED1/2` is available for new general-purpose **never**-Simple-V + (non-Vectoriseable) 32-bit encodings +* EXT248-263 is for "new" instructions which **must** also simultaneously request the corresponding space - in SVP64, even if the instruction is non-Vectoriseable. Best - allocated to instructions that have the potential to be Simple-V-Vectorised + in SVP64, even if the instruction is non-Vectoriseable. * Anything Vectorised-EXT000-063 is **automatically** being requested as 100% Reserved for every single "Defined Word" - (Public v3.1 1.6.3 definition). + (Public v3.1 1.6.3 definition). Vectorised-EXT001 is defined as illegal. * Any **future** instruction added to EXT000-063 likewise, is **automatically** assigned corresponding reservations in the SVP64:EXT000-063 -- 2.30.2