From ed359ebc317acbf7e2d948232f11e98a701277d0 Mon Sep 17 00:00:00 2001
From: Jim Wilson <wilson@gcc.gnu.org>
Date: Thu, 31 Dec 1992 12:55:33 -0800
Subject: [PATCH] Add peephole to eliminate unecessary clear instructions in
 strict_low_part insn sequences.

From-SVN: r3015
---
 gcc/config/m68k/m68k.md | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 47132135e5f..09fb81b64b4 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -4884,6 +4884,29 @@
   return \"\";
 }")
 
+(define_peephole
+  [(set (match_operand:SI 0 "register_operand" "=d")
+	(const_int 0))
+   (set (strict_low_part (subreg:HI (match_dup 0) 0))
+	(match_operand:HI 1 "general_operand" "rmn"))]
+  "strict_low_part_peephole_ok (HImode, prev_nonnote_insn (insn), operands[0])"
+  "*
+{
+  if (GET_CODE (operands[1]) == CONST_INT)
+    {
+      if (operands[1] == const0_rtx
+	  && (DATA_REG_P (operands[0])
+	      || GET_CODE (operands[0]) == MEM)
+	  /* clr insns on 68000 read before writing.
+	     This isn't so on the 68010, but we have no alternative for it.  */
+	  && (TARGET_68020
+	      || !(GET_CODE (operands[0]) == MEM
+		   && MEM_VOLATILE_P (operands[0]))))
+	return \"clr%.w %0\";
+    }
+  return \"move%.w %1,%0\";
+}")
+
 ;; dbCC peepholes
 ;;
 ;; Turns
-- 
2.30.2