From ed383d79ee753208f0df0cdad55c9cbfb90178d6 Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Thu, 30 May 2019 18:13:06 +0000 Subject: [PATCH] constraints.md (eI): New constraint. 2019-05-30 Bill Schmidt Michael Meissner * config/rs6000/constraints.md (eI): New constraint. * config/rs6000/predicates.md (cint34_operand): New predicate. * config/rs6000/rs6000.h (SIGNED_16BIT_OFFSET_P): New #define. (SIGNED_34BIT_OFFSET_P): Likewise. * doc/md.texi (eI): Document constraint. Co-Authored-By: Michael Meissner From-SVN: r271787 --- gcc/ChangeLog | 9 +++++++++ gcc/config/rs6000/constraints.md | 5 +++++ gcc/config/rs6000/predicates.md | 10 ++++++++++ gcc/config/rs6000/rs6000.h | 14 ++++++++++++++ gcc/doc/md.texi | 3 +++ 5 files changed, 41 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index caee629653f..20099e9d960 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2019-05-30 Bill Schmidt + Michael Meissner + + * config/rs6000/constraints.md (eI): New constraint. + * config/rs6000/predicates.md (cint34_operand): New predicate. + * config/rs6000/rs6000.h (SIGNED_16BIT_OFFSET_P): New #define. + (SIGNED_34BIT_OFFSET_P): Likewise. + * doc/md.texi (eI): Document constraint. + 2019-05-30 Sylvia Taylor * config/aarch64/aarch64-sve.md (*fabd3): New. diff --git a/gcc/config/rs6000/constraints.md b/gcc/config/rs6000/constraints.md index fd8be343f09..8004a92fd40 100644 --- a/gcc/config/rs6000/constraints.md +++ b/gcc/config/rs6000/constraints.md @@ -210,6 +210,11 @@ (and (match_code "const_int") (match_test "((- (unsigned HOST_WIDE_INT) ival) + 0x8000) < 0x10000"))) +;; 34-bit signed integer constant +(define_constraint "eI" + "34-bit constant integer that can be loaded with PADDI" + (match_operand 0 "cint34_operand")) + ;; Floating-point constraints. These two are defined so that insn ;; length attributes can be calculated exactly. diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 2643f1abd2e..a578e0f27f7 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -302,6 +302,16 @@ (and (match_code "const_int") (match_test "IN_RANGE (INTVAL (op), 0, 15)"))) +;; Return 1 if op is a 34-bit constant integer. +(define_predicate "cint34_operand" + (match_code "const_int") +{ + if (!TARGET_PREFIXED_ADDR) + return 0; + + return SIGNED_34BIT_OFFSET_P (INTVAL (op), 0); +}) + ;; Return 1 if op is a register that is not special. ;; Disallow (SUBREG:SF (REG:SI)) and (SUBREG:SI (REG:SF)) on VSX systems where ;; you need to be careful in moving a SFmode to SImode and vice versa due to diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index f50ae946b32..8119c6621d5 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2502,3 +2502,17 @@ extern GTY(()) tree rs6000_builtin_decls[RS6000_BUILTIN_COUNT]; #if (GCC_VERSION >= 3000) #pragma GCC poison TARGET_FLOAT128 OPTION_MASK_FLOAT128 MASK_FLOAT128 #endif + +/* Whether a given VALUE is a valid 16- or 34-bit signed offset. EXTRA is the + amount that we can't touch at the high end of the range (typically if the + address is split into smaller addresses, the extra covers the addresses + which might be generated when the insn is split). */ +#define SIGNED_16BIT_OFFSET_P(VALUE, EXTRA) \ + IN_RANGE (VALUE, \ + -(HOST_WIDE_INT_1 << 15), \ + (HOST_WIDE_INT_1 << 15) - 1 - (EXTRA)) + +#define SIGNED_34BIT_OFFSET_P(VALUE, EXTRA) \ + IN_RANGE (VALUE, \ + -(HOST_WIDE_INT_1 << 33), \ + (HOST_WIDE_INT_1 << 33) - 1 - (EXTRA)) diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index db9c210edb8..775b8f5b715 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -3367,6 +3367,9 @@ Zero @item P Constant whose negation is a signed 16-bit constant +@item eI +Signed 34-bit integer constant if prefixed instructions are supported. + @item G Floating point constant that can be loaded into a register with one instruction per word -- 2.30.2