From edad6f7c44935e4a6b31380fe7cc70bfd643f50e Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 28 Mar 2022 18:23:12 +0100 Subject: [PATCH] --- openpower/sv/cr_int_predication.mdwn | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn index ae41ea98c..62328fd5b 100644 --- a/openpower/sv/cr_int_predication.mdwn +++ b/openpower/sv/cr_int_predication.mdwn @@ -270,3 +270,8 @@ It should be clear that this instruction uses bits of the integer predicate to decide whether to set CR Fields to `(mask & ~mode)` or to zero. Thus, in effect, it is the integer predicate that has been copied into the CR Fields. + +By using twin predication, zeroing, and inversion (sm=~r3, dm=r10) for example, it becomes possible to combine two Integers together in +order to set bits in CR Fields. +Likewise there are dozens of ways that CR Predicates can be used, on the +same sv.mtcrweird instruction. -- 2.30.2