From edfb5be31897f07f24ba9aa02860f896ee1b69a3 Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 25 Jun 2018 08:11:34 +0100
Subject: [PATCH] start removing GenericIOType

---
 src/test_bsv/pinmux.bsv | 48 +++++------------------------------------
 1 file changed, 5 insertions(+), 43 deletions(-)

diff --git a/src/test_bsv/pinmux.bsv b/src/test_bsv/pinmux.bsv
index 0ed2447..688e7a4 100644
--- a/src/test_bsv/pinmux.bsv
+++ b/src/test_bsv/pinmux.bsv
@@ -109,20 +109,10 @@ package pinmux;
 
       // following wires capture signals to IO CELL if uart-0 is
       // allotted to it
+      // declare wruart_tx_*, set up as type 'out'
       Wire#(Bit#(1)) wruart_tx<-mkDWire(0);
+      // declare wruart_rx_*, set up as type 'input'
       Wire#(Bit#(1)) wruart_rx<-mkDWire(0);
-      // declare uart_tx_io, set up as type 'out'
-      GenericIOType uart_tx_io = GenericIOType{
-                 outputval:wruart_tx,
-                 output_en:1,
-                 input_en:0,
-      };
-      // declare uart_rx_io, set up as type 'input'
-      GenericIOType uart_rx_io = GenericIOType{
-                 outputval:0,
-                 output_en:0,
-                 input_en:1,
-      };
 
       // following wires capture signals to IO CELL if gpioa-0 is
       // allotted to it
@@ -135,52 +125,24 @@ package pinmux;
       Wire#(Bit#(1)) wrgpioa_a2_out<-mkDWire(0);
       Wire#(Bit#(1)) wrgpioa_a2_outen<-mkDWire(0);
       Wire#(Bit#(1)) wrgpioa_a2_in<-mkDWire(0);
-      // declare gpioa_a0_io, set up as type 'inout'
-      GenericIOType gpioa_a0_io = GenericIOType{
-                 outputval:wrgpioa_a0_out,
-                 output_en:wrgpioa_a0_outen,
-                 input_en:~wrgpioa_a0_outen,
-      };
-      // declare gpioa_a1_io, set up as type 'inout'
-      GenericIOType gpioa_a1_io = GenericIOType{
-                 outputval:wrgpioa_a1_out,
-                 output_en:wrgpioa_a1_outen,
-                 input_en:~wrgpioa_a1_outen,
-      };
-      // declare gpioa_a2_io, set up as type 'inout'
-      GenericIOType gpioa_a2_io = GenericIOType{
-                 outputval:wrgpioa_a2_out,
-                 output_en:wrgpioa_a2_outen,
-                 input_en:~wrgpioa_a2_outen,
-      };
 
       // following wires capture signals to IO CELL if twi-0 is
       // allotted to it
+      // declare wrtwi_sda_*, set up as type 'inout'
       Wire#(Bit#(1)) wrtwi_sda_out<-mkDWire(0);
       Wire#(Bit#(1)) wrtwi_sda_outen<-mkDWire(0);
       Wire#(Bit#(1)) wrtwi_sda_in<-mkDWire(0);
+      // declare wrtwi_scl_io*, set up as type 'inout'
       Wire#(Bit#(1)) wrtwi_scl_out<-mkDWire(0);
       Wire#(Bit#(1)) wrtwi_scl_outen<-mkDWire(0);
       Wire#(Bit#(1)) wrtwi_scl_in<-mkDWire(0);
-      // declare twi_sda_io, set up as type 'inout'
-      GenericIOType twi_sda_io = GenericIOType{
-                 outputval:wrtwi_sda_out,
-                 output_en:wrtwi_sda_outen,
-                 input_en:~wrtwi_sda_outen,
-      };
-      // declare twi_scl_io, set up as type 'inout'
-      GenericIOType twi_scl_io = GenericIOType{
-                 outputval:wrtwi_scl_out,
-                 output_en:wrtwi_scl_outen,
-                 input_en:~wrtwi_scl_outen,
-      };
 
 
       /*====== This where the muxing starts for each io-cell======*/
       // TODO: this needs to stop using GenericIOType and
       // set the output (and only the output) as a wire
        // output muxer for cell idx 0
-      cell0_mux_out=wrcell0_mux==0?gpioa_a0_io:
+      cell0_mux_out=wrcell0_mux==0?gpioa_a0_io_out:
 			wrcell0_mux==1?uart0_tx_io:
 			0;
 
-- 
2.30.2