From ee0f0108c8e87b9cfec25bade66670bbc4254139 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Kristian=20H=C3=B8gsberg=20Kristensen?= Date: Wed, 7 Oct 2015 05:06:30 -0700 Subject: [PATCH] i965: Move brw_get_shader_time_index() call out of emit functions MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit brw_get_shader_time_index() is all tangled up in brw_context state and we can't call it from the compiler. Thanks the Jasons recent refactoring, we can just get the index and pass to the emit functions instead. Reviewed-by: Jason Ekstrand Signed-off-by: Kristian Høgsberg Kristensen --- src/mesa/drivers/dri/i965/brw_cs.c | 6 +++++- src/mesa/drivers/dri/i965/brw_cs.h | 1 + src/mesa/drivers/dri/i965/brw_fs.cpp | 20 ++++++------------- src/mesa/drivers/dri/i965/brw_gs.c | 6 +++++- src/mesa/drivers/dri/i965/brw_vec4.cpp | 9 +++------ .../drivers/dri/i965/brw_vec4_gs_visitor.cpp | 11 ++++------ .../drivers/dri/i965/brw_vec4_gs_visitor.h | 1 + src/mesa/drivers/dri/i965/brw_vs.c | 6 +++++- src/mesa/drivers/dri/i965/brw_vs.h | 1 + src/mesa/drivers/dri/i965/brw_wm.c | 8 +++++++- src/mesa/drivers/dri/i965/brw_wm.h | 2 ++ 11 files changed, 40 insertions(+), 31 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965/brw_cs.c index 34680ee6e3a..45fb816c160 100644 --- a/src/mesa/drivers/dri/i965/brw_cs.c +++ b/src/mesa/drivers/dri/i965/brw_cs.c @@ -101,8 +101,12 @@ brw_codegen_cs_prog(struct brw_context *brw, if (unlikely(INTEL_DEBUG & DEBUG_CS)) brw_dump_ir("compute", prog, &cs->base, &cp->program.Base); + int st_index = -1; + if (INTEL_DEBUG & DEBUG_SHADER_TIME) + st_index = brw_get_shader_time_index(brw, prog, &cp->program.Base, ST_CS); + program = brw_cs_emit(brw, mem_ctx, key, &prog_data, - &cp->program, prog, &program_size); + &cp->program, prog, st_index, &program_size); if (program == NULL) { ralloc_free(mem_ctx); return false; diff --git a/src/mesa/drivers/dri/i965/brw_cs.h b/src/mesa/drivers/dri/i965/brw_cs.h index c07eb6ca6ee..17c2ff9871a 100644 --- a/src/mesa/drivers/dri/i965/brw_cs.h +++ b/src/mesa/drivers/dri/i965/brw_cs.h @@ -46,6 +46,7 @@ brw_cs_emit(struct brw_context *brw, struct brw_cs_prog_data *prog_data, struct gl_compute_program *cp, struct gl_shader_program *prog, + int shader_time_index, unsigned *final_assembly_size); void diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 6ce15703340..f1282a0948f 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -5121,18 +5121,13 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_prog_data *prog_data, struct gl_fragment_program *fp, struct gl_shader_program *prog, + int shader_time_index8, int shader_time_index16, unsigned *final_assembly_size) { - int st_index8 = -1, st_index16 = -1; - if (INTEL_DEBUG & DEBUG_SHADER_TIME) { - st_index8 = brw_get_shader_time_index(brw, prog, &fp->Base, ST_FS8); - st_index16 = brw_get_shader_time_index(brw, prog, &fp->Base, ST_FS16); - } - /* Now the main event: Visit the shader IR and generate our FS IR for it. */ fs_visitor v(brw->intelScreen->compiler, brw, mem_ctx, key, - &prog_data->base, &fp->Base, fp->Base.nir, 8, st_index8); + &prog_data->base, &fp->Base, fp->Base.nir, 8, shader_time_index8); if (!v.run_fs(false /* do_rep_send */)) { if (prog) { prog->LinkStatus = false; @@ -5147,7 +5142,7 @@ brw_wm_fs_emit(struct brw_context *brw, cfg_t *simd16_cfg = NULL; fs_visitor v2(brw->intelScreen->compiler, brw, mem_ctx, key, - &prog_data->base, &fp->Base, fp->Base.nir, 16, st_index16); + &prog_data->base, &fp->Base, fp->Base.nir, 16, shader_time_index16); if (likely(!(INTEL_DEBUG & DEBUG_NO16) || brw->use_rep_send)) { if (!v.simd16_unsupported) { /* Try a SIMD16 compile */ @@ -5274,6 +5269,7 @@ brw_cs_emit(struct brw_context *brw, struct brw_cs_prog_data *prog_data, struct gl_compute_program *cp, struct gl_shader_program *prog, + int shader_time_index, unsigned *final_assembly_size) { prog_data->local_size[0] = cp->LocalSize[0]; @@ -5285,14 +5281,10 @@ brw_cs_emit(struct brw_context *brw, cfg_t *cfg = NULL; const char *fail_msg = NULL; - int st_index = -1; - if (INTEL_DEBUG & DEBUG_SHADER_TIME) - st_index = brw_get_shader_time_index(brw, prog, &cp->Base, ST_CS); - /* Now the main event: Visit the shader IR and generate our CS IR for it. */ fs_visitor v8(brw->intelScreen->compiler, brw, mem_ctx, key, - &prog_data->base, &cp->Base, cp->Base.nir, 8, st_index); + &prog_data->base, &cp->Base, cp->Base.nir, 8, shader_time_index); if (!v8.run_cs()) { fail_msg = v8.fail_msg; } else if (local_workgroup_size <= 8 * brw->max_cs_threads) { @@ -5301,7 +5293,7 @@ brw_cs_emit(struct brw_context *brw, } fs_visitor v16(brw->intelScreen->compiler, brw, mem_ctx, key, - &prog_data->base, &cp->Base, cp->Base.nir, 16, st_index); + &prog_data->base, &cp->Base, cp->Base.nir, 16, shader_time_index); if (likely(!(INTEL_DEBUG & DEBUG_NO16)) && !fail_msg && !v8.simd16_unsupported && local_workgroup_size <= 16 * brw->max_cs_threads) { diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index 26c91e4c76a..e0165fb4a23 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -294,10 +294,14 @@ brw_codegen_gs_prog(struct brw_context *brw, if (unlikely(INTEL_DEBUG & DEBUG_GS)) brw_dump_ir("geometry", prog, gs, NULL); + int st_index = -1; + if (INTEL_DEBUG & DEBUG_SHADER_TIME) + st_index = brw_get_shader_time_index(brw, prog, NULL, ST_GS); + void *mem_ctx = ralloc_context(NULL); unsigned program_size; const unsigned *program = - brw_gs_emit(brw, prog, &c, mem_ctx, &program_size); + brw_gs_emit(brw, prog, &c, mem_ctx, st_index, &program_size); if (program == NULL) { ralloc_free(mem_ctx); return false; diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index 4b4a216d5f5..e966b96a5ca 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -1943,21 +1943,18 @@ brw_vs_emit(struct brw_context *brw, struct brw_vs_prog_data *prog_data, struct gl_vertex_program *vp, struct gl_shader_program *prog, + int shader_time_index, unsigned *final_assembly_size) { const unsigned *assembly = NULL; - int st_index = -1; - if (INTEL_DEBUG & DEBUG_SHADER_TIME) - st_index = brw_get_shader_time_index(brw, prog, &vp->Base, ST_VS); - if (brw->intelScreen->compiler->scalar_vs) { prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8; fs_visitor v(brw->intelScreen->compiler, brw, mem_ctx, key, &prog_data->base.base, NULL, /* prog; Only used for TEXTURE_RECTANGLE on gen < 8 */ - vp->Base.nir, 8, st_index); + vp->Base.nir, 8, shader_time_index); if (!v.run_vs(brw_select_clip_planes(&brw->ctx))) { if (prog) { prog->LinkStatus = false; @@ -1995,7 +1992,7 @@ brw_vs_emit(struct brw_context *brw, vec4_vs_visitor v(brw->intelScreen->compiler, brw, key, prog_data, vp->Base.nir, brw_select_clip_planes(&brw->ctx), - mem_ctx, st_index, + mem_ctx, shader_time_index, !_mesa_is_gles3(&brw->ctx)); if (!v.run()) { if (prog) { diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp index 36ab25d1259..4ce471e0669 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp @@ -618,14 +618,11 @@ brw_gs_emit(struct brw_context *brw, struct gl_shader_program *prog, struct brw_gs_compile *c, void *mem_ctx, + int shader_time_index, unsigned *final_assembly_size) { struct gl_shader *shader = prog->_LinkedShaders[MESA_SHADER_GEOMETRY]; - int st_index = -1; - if (INTEL_DEBUG & DEBUG_SHADER_TIME) - st_index = brw_get_shader_time_index(brw, prog, NULL, ST_GS); - if (brw->gen >= 7) { /* Compile the geometry shader in DUAL_OBJECT dispatch mode, if we can do * so without spilling. If the GS invocations count > 1, then we can't use @@ -637,7 +634,7 @@ brw_gs_emit(struct brw_context *brw, vec4_gs_visitor v(brw->intelScreen->compiler, brw, c, shader->Program->nir, - mem_ctx, true /* no_spills */, st_index); + mem_ctx, true /* no_spills */, shader_time_index); if (v.run()) { return generate_assembly(brw, prog, &c->gp->program.Base, &c->prog_data.base, mem_ctx, v.cfg, @@ -681,12 +678,12 @@ brw_gs_emit(struct brw_context *brw, gs = new vec4_gs_visitor(brw->intelScreen->compiler, brw, c, shader->Program->nir, mem_ctx, false /* no_spills */, - st_index); + shader_time_index); else gs = new gen6_gs_visitor(brw->intelScreen->compiler, brw, c, prog, shader->Program->nir, mem_ctx, false /* no_spills */, - st_index); + shader_time_index); if (!gs->run()) { prog->LinkStatus = false; diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h index da93f0dc1c6..3ff195c3e68 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h +++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.h @@ -55,6 +55,7 @@ const unsigned *brw_gs_emit(struct brw_context *brw, struct gl_shader_program *prog, struct brw_gs_compile *c, void *mem_ctx, + int shader_time_index, unsigned *final_assembly_size); #ifdef __cplusplus diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 36ba52e858b..38de98fab86 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -173,10 +173,14 @@ brw_codegen_vs_prog(struct brw_context *brw, if (unlikely(INTEL_DEBUG & DEBUG_VS)) brw_dump_ir("vertex", prog, &vs->base, &vp->program.Base); + int st_index = -1; + if (INTEL_DEBUG & DEBUG_SHADER_TIME) + st_index = brw_get_shader_time_index(brw, prog, &vp->program.Base, ST_VS); + /* Emit GEN4 code. */ program = brw_vs_emit(brw, mem_ctx, key, &prog_data, - &vp->program, prog, &program_size); + &vp->program, prog, st_index, &program_size); if (program == NULL) { ralloc_free(mem_ctx); return false; diff --git a/src/mesa/drivers/dri/i965/brw_vs.h b/src/mesa/drivers/dri/i965/brw_vs.h index 19551c9d550..f1242f61b33 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.h +++ b/src/mesa/drivers/dri/i965/brw_vs.h @@ -60,6 +60,7 @@ const unsigned *brw_vs_emit(struct brw_context *brw, struct brw_vs_prog_data *prog_data, struct gl_vertex_program *vp, struct gl_shader_program *shader_prog, + int shader_time_index, unsigned *program_size); void brw_vs_debug_recompile(struct brw_context *brw, struct gl_shader_program *prog, diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 81a1d90bb60..4d5e7f67bd6 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -224,8 +224,14 @@ brw_codegen_wm_prog(struct brw_context *brw, if (unlikely(INTEL_DEBUG & DEBUG_WM)) brw_dump_ir("fragment", prog, &fs->base, &fp->program.Base); + int st_index8 = -1, st_index16 = -1; + if (INTEL_DEBUG & DEBUG_SHADER_TIME) { + st_index8 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS8); + st_index16 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS16); + } + program = brw_wm_fs_emit(brw, mem_ctx, key, &prog_data, - &fp->program, prog, &program_size); + &fp->program, prog, st_index8, st_index16, &program_size); if (program == NULL) { ralloc_free(mem_ctx); return false; diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index 77b83b0a3f8..6ee22b2f907 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -72,6 +72,8 @@ const unsigned *brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_prog_data *prog_data, struct gl_fragment_program *fp, struct gl_shader_program *prog, + int shader_time_index8, + int shader_time_index16, unsigned *final_assembly_size); GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog); -- 2.30.2