From ee3e1a6d755723c239691f92b5ff595701b5d8e9 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 11 May 2023 17:23:41 +0100 Subject: [PATCH] --- openpower/sv/svp64.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn index 46e9578be..c15ba9cfd 100644 --- a/openpower/sv/svp64.mdwn +++ b/openpower/sv/svp64.mdwn @@ -554,7 +554,7 @@ Where the integer regfile in standard scalar Power ISA v3.0B/v3.1B is r0 to r31, SV extends this range (in the Upper Compliancy Levels of SV) as r0 to r127. Likewise FP registers are extended to 128 (fp0 to fp127), and CR Fields are extended to 128 entries, -CR0 thru CR127. In the Lower SV Compliancy Levels the quantity of regiaters +CR0 thru CR127. In the Lower SV Compliancy Levels the quantity of registers remains the same in order to reduce implementation cost for Embedded systems. The names of the registers therefore reflects a simple linear extension -- 2.30.2