From ee48e3acb87e2752b511a4915391c325f9b2c75d Mon Sep 17 00:00:00 2001 From: Gert Wollny Date: Fri, 1 Dec 2017 15:46:20 +0100 Subject: [PATCH] mesa/st/glsl_to_tgsi: Add some operators for glsl_to_tgsi related classes Add the equal operator and the "<<" stream write operator for the st_*_reg classes and the "<<" operator to the instruction class, and make use of these operators in the debugging output. v5: Fix empty lines Reviewed-by: Brian Paul (v4) Signed-off-by: Gert Wollny --- .../state_tracker/st_glsl_to_tgsi_private.cpp | 166 ++++++++++++++++++ .../state_tracker/st_glsl_to_tgsi_private.h | 19 ++ .../st_glsl_to_tgsi_temprename.cpp | 105 ++--------- 3 files changed, 202 insertions(+), 88 deletions(-) diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi_private.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi_private.cpp index b664fa7ec3f..dabb0362a77 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi_private.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi_private.cpp @@ -26,6 +26,7 @@ #include "st_glsl_to_tgsi_private.h" #include #include +#include static int swizzle_for_type(const glsl_type *type, int component = 0) { @@ -179,6 +180,80 @@ st_src_reg st_src_reg::get_abs() return reg; } +bool operator == (const st_src_reg& lhs, const st_src_reg& rhs) +{ + bool result; + + if (lhs.type != rhs.type || + lhs.file != rhs.file || + lhs.index != rhs.index || + lhs.swizzle != rhs.swizzle || + lhs.index2D != rhs.index2D || + lhs.has_index2 != rhs.has_index2 || + lhs.array_id != rhs.array_id || + lhs.negate != rhs.negate || + lhs.abs != rhs.abs || + lhs.double_reg2 != rhs.double_reg2 || + lhs.is_double_vertex_input != rhs.is_double_vertex_input) + return false; + + if (lhs.reladdr) { + if (!rhs.reladdr) + return false; + result = (*lhs.reladdr == *rhs.reladdr); + } else { + result = !rhs.reladdr; + } + + if (lhs.reladdr2) { + if (!rhs.reladdr2) + return false; + result &= (*lhs.reladdr2 == *rhs.reladdr2); + } else { + result &= !rhs.reladdr2; + } + + return result; +} + +static const char swz_txt[] = "xyzw"; + +std::ostream& operator << (std::ostream& os, const st_src_reg& reg) +{ + if (reg.negate) + os << "-"; + if (reg.abs) + os << "|"; + + os << _mesa_register_file_name(reg.file); + + if (reg.file == PROGRAM_ARRAY) { + os << "(" << reg.array_id << ")"; + } + if (reg.has_index2) { + os << "["; + if (reg.reladdr2) { + os << *reg.reladdr2; + } + os << "+" << reg.index2D << "]"; + } + os << "["; + if (reg.reladdr) { + os << *reg.reladdr; + } + os << reg.index << "]."; + for (int i = 0; i < 4; ++i) { + int swz = GET_SWZ(reg.swizzle, i); + if (swz < 4) + os << swz_txt[swz]; + else + os << "_"; + } + if (reg.abs) + os << "|"; + return os; +} + st_dst_reg::st_dst_reg(st_src_reg reg) { this->type = reg.type; @@ -250,3 +325,94 @@ void st_dst_reg::operator=(const st_dst_reg ®) this->has_index2 = reg.has_index2; this->array_id = reg.array_id; } + +bool operator == (const st_dst_reg& lhs, const st_dst_reg& rhs) +{ + bool result; + + if (lhs.type != rhs.type || + lhs.file != rhs.file || + lhs.index != rhs.index || + lhs.writemask != rhs.writemask || + lhs.index2D != rhs.index2D || + lhs.has_index2 != rhs.has_index2 || + lhs.array_id != rhs.array_id) + return false; + + if (lhs.reladdr) { + if (!rhs.reladdr) + return false; + result = (*lhs.reladdr == *rhs.reladdr); + } else { + result = !rhs.reladdr; + } + + if (lhs.reladdr2) { + if (!rhs.reladdr2) + return false; + result &= (*lhs.reladdr2 == *rhs.reladdr2); + } else { + result &= !rhs.reladdr2; + } + + return result; +} + +std::ostream& operator << (std::ostream& os, const st_dst_reg& reg) +{ + os << _mesa_register_file_name(reg.file); + if (reg.file == PROGRAM_ARRAY) { + os << "(" << reg.array_id << ")"; + } + if (reg.has_index2) { + os << "["; + if (reg.reladdr2) { + os << *reg.reladdr2; + } + os << "+" << reg.index2D << "]"; + } + os << "["; + if (reg.reladdr) { + os << *reg.reladdr; + } + os << reg.index << "]."; + for (int i = 0; i < 4; ++i) { + if (1 << i & reg.writemask) + os << swz_txt[i]; + else + os << "_"; + } + + return os; +} + +void glsl_to_tgsi_instruction::print(std::ostream& os) const +{ + os << tgsi_get_opcode_name(info->opcode) << " "; + + bool has_operators = false; + for (unsigned j = 0; j < num_inst_dst_regs(this); j++) { + has_operators = true; + if (j > 0) + os << ", "; + os << dst[j]; + } + + if (has_operators) + os << " := "; + + for (unsigned j = 0; j < num_inst_src_regs(this); j++) { + if (j > 0) + os << ", "; + os << src[j]; + } + + if (tex_offset_num_offset > 0) { + os << ", TEXOFS: "; + for (unsigned j = 0; j < tex_offset_num_offset; j++) { + if (j > 0) + os << ", "; + os << tex_offsets[j]; + } + } +} diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi_private.h b/src/mesa/state_tracker/st_glsl_to_tgsi_private.h index b7f535b97d2..832ea00e274 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi_private.h +++ b/src/mesa/state_tracker/st_glsl_to_tgsi_private.h @@ -30,6 +30,7 @@ #include #include #include +#include int swizzle_for_size(int size); @@ -84,6 +85,10 @@ public: } }; +bool operator == (const st_src_reg& lhs, const st_src_reg& rhs); + +std::ostream& operator << (std::ostream& os, const st_src_reg& reg); + class st_dst_reg { public: st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type, int index); @@ -109,6 +114,11 @@ public: st_src_reg *reladdr2; }; +bool operator == (const st_dst_reg& lhs, const st_dst_reg& rhs); + +std::ostream& operator << (std::ostream& os, const st_dst_reg& reg); + + class glsl_to_tgsi_instruction : public exec_node { public: DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction) @@ -136,8 +146,17 @@ public: unsigned buffer_access:3; /**< bitmask of TGSI_MEMORY_x bits */ const struct tgsi_opcode_info *info; + + void print(std::ostream& os) const; }; +inline std::ostream& +operator << (std::ostream& os, const glsl_to_tgsi_instruction& instr) +{ + instr.print(os); + return os; +} + struct rename_reg_pair { bool valid; int new_reg; diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp index c63bde3224d..509342e53f0 100644 --- a/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp +++ b/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp @@ -42,6 +42,7 @@ #include "util/debug.h" using std::cerr; using std::setw; +using std::ostream; #endif /* If is included this is defined and clashes with @@ -60,6 +61,9 @@ using std::numeric_limits; #endif #ifndef NDEBUG +/* Prepare to make it possible to specify log file */ +static std::ostream& debug_log = cerr; + /* Helper function to check whether we want to seen debugging output */ static inline bool is_debug_enabled () { @@ -602,7 +606,7 @@ public: #ifndef NDEBUG /* Function used for debugging. */ -static void dump_instruction(int line, prog_scope *scope, +static void dump_instruction(ostream& os, int line, prog_scope *scope, const glsl_to_tgsi_instruction& inst); #endif @@ -640,7 +644,7 @@ get_temp_registers_required_lifetimes(void *mem_ctx, exec_list *instructions, prog_scope *cur_scope = scopes.create(nullptr, outer_scope, 0, 0, line); - RENAME_DEBUG(cerr << "========= Begin shader ============\n"); + RENAME_DEBUG(debug_log << "========= Begin shader ============\n"); foreach_in_list(glsl_to_tgsi_instruction, inst, instructions) { if (is_at_end) { @@ -648,7 +652,7 @@ get_temp_registers_required_lifetimes(void *mem_ctx, exec_list *instructions, break; } - RENAME_DEBUG(dump_instruction(line, cur_scope, *inst)); + RENAME_DEBUG(dump_instruction(debug_log, line, cur_scope, *inst)); switch (inst->op) { case TGSI_OPCODE_BGNLOOP: { @@ -783,7 +787,7 @@ get_temp_registers_required_lifetimes(void *mem_ctx, exec_list *instructions, ++line; } - RENAME_DEBUG(cerr << "==================================\n\n"); + RENAME_DEBUG(debug_log << "==================================\n\n"); /* Make sure last scope is closed, even though no * TGSI_OPCODE_END was given. @@ -791,14 +795,14 @@ get_temp_registers_required_lifetimes(void *mem_ctx, exec_list *instructions, if (cur_scope->end() < 0) cur_scope->set_end(line - 1); - RENAME_DEBUG(cerr << "========= lifetimes ==============\n"); + RENAME_DEBUG(debug_log << "========= lifetimes ==============\n"); for(int i = 0; i < ntemps; ++i) { - RENAME_DEBUG(cerr << setw(4) << i); + RENAME_DEBUG(debug_log << setw(4) << i); lifetimes[i] = acc[i].get_required_lifetime(); - RENAME_DEBUG(cerr << ": [" << lifetimes[i].begin << ", " + RENAME_DEBUG(debug_log << ": [" << lifetimes[i].begin << ", " << lifetimes[i].end << "]\n"); } - RENAME_DEBUG(cerr << "==================================\n\n"); + RENAME_DEBUG(debug_log << "==================================\n\n"); out: delete[] acc; @@ -911,20 +915,11 @@ void get_temp_registers_remapping(void *mem_ctx, int ntemps, /* Code below used for debugging */ #ifndef NDEBUG -static const char swizzle_txt[] = "xyzw"; - -static const char *tgsi_file_names[PROGRAM_FILE_MAX] = { - "TEMP", "ARRAY", "IN", "OUT", "STATE", "CONST", - "UNIFORM", "WO", "ADDR", "SAMPLER", "SV", "UNDEF", - "IMM", "BUF", "MEM", "IMAGE" -}; - static -void dump_instruction(int line, prog_scope *scope, +void dump_instruction(ostream& os, int line, prog_scope *scope, const glsl_to_tgsi_instruction& inst) { - const struct tgsi_opcode_info *info = tgsi_get_opcode_info(inst.op); - + const struct tgsi_opcode_info *info = inst.info; int indent = scope->nesting_depth(); if ((scope->type() == switch_case_branch || scope->type() == switch_default_branch) && @@ -938,74 +933,8 @@ void dump_instruction(int line, prog_scope *scope, info->opcode == TGSI_OPCODE_ENDSWITCH) --indent; - cerr << setw(4) << line << ": "; - for (int i = 0; i < indent; ++i) - cerr << " "; - cerr << tgsi_get_opcode_name(info->opcode) << " "; - - bool has_operators = false; - for (unsigned j = 0; j < num_inst_dst_regs(&inst); j++) { - has_operators = true; - if (j > 0) - cerr << ", "; - - const st_dst_reg& dst = inst.dst[j]; - cerr << tgsi_file_names[dst.file]; - - if (dst.file == PROGRAM_ARRAY) - cerr << "(" << dst.array_id << ")"; - - cerr << "[" << dst.index << "]"; - - if (dst.writemask != TGSI_WRITEMASK_XYZW) { - cerr << "."; - if (dst.writemask & TGSI_WRITEMASK_X) cerr << "x"; - if (dst.writemask & TGSI_WRITEMASK_Y) cerr << "y"; - if (dst.writemask & TGSI_WRITEMASK_Z) cerr << "z"; - if (dst.writemask & TGSI_WRITEMASK_W) cerr << "w"; - } - } - if (has_operators) - cerr << " := "; - - for (unsigned j = 0; j < num_inst_src_regs(&inst); j++) { - if (j > 0) - cerr << ", "; - - const st_src_reg& src = inst.src[j]; - cerr << tgsi_file_names[src.file] - << "[" << src.index << "]"; - if (src.swizzle != SWIZZLE_XYZW) { - cerr << "."; - for (int idx = 0; idx < 4; ++idx) { - int swz = GET_SWZ(src.swizzle, idx); - if (swz < 4) { - cerr << swizzle_txt[swz]; - } - } - } - } - - if (inst.tex_offset_num_offset > 0) { - cerr << ", TEXOFS: "; - for (unsigned j = 0; j < inst.tex_offset_num_offset; j++) { - if (j > 0) - cerr << ", "; - - const st_src_reg& src = inst.tex_offsets[j]; - cerr << tgsi_file_names[src.file] - << "[" << src.index << "]"; - if (src.swizzle != SWIZZLE_XYZW) { - cerr << "."; - for (int idx = 0; idx < 4; ++idx) { - int swz = GET_SWZ(src.swizzle, idx); - if (swz < 4) { - cerr << swizzle_txt[swz]; - } - } - } - } - } - cerr << "\n"; + os << setw(4) << line << ": "; + os << setw(indent * 4) << " "; + os << inst << "\n"; } #endif -- 2.30.2