From ee6824ae01132c0175ad8db0e58e19ee661fe5cb Mon Sep 17 00:00:00 2001 From: Ramana Radhakrishnan Date: Fri, 6 May 2011 10:56:32 +0000 Subject: [PATCH] re PR target/47930 (-marm is undocumented; driver accepts -mno-thumb) 2011-05-06 Ramana Radhakrishnan PR target/47930 * config/arm/arm.opt (marm): Document it. (mthumb): Reject negative variant. From-SVN: r173481 --- gcc/ChangeLog | 6 ++++++ gcc/config/arm/arm.opt | 7 ++++--- gcc/doc/invoke.texi | 16 ++++++++-------- 3 files changed, 18 insertions(+), 11 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0d9b62fef68..9927119013e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2011-05-06 Ramana Radhakrishnan + + PR target/47930 + * config/arm/arm.opt (marm): Document it. + (mthumb): Reject negative variant. + 2011-05-06 Uros Bizjak PR target/48898 diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 7d2d84cda7d..89c8cbd47d4 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -52,7 +52,8 @@ Target RejectNegative Joined Enum(arm_arch) Var(arm_arch_option) Specify the name of the target architecture marm -Target RejectNegative InverseMask(THUMB) Undocumented +Target Report RejectNegative InverseMask(THUMB) +Generate code in 32 bit ARM state. mbig-endian Target Report RejectNegative Mask(BIG_END) @@ -131,8 +132,8 @@ Target RejectNegative Joined Var(structure_size_string) Specify the minimum bit alignment of structures mthumb -Target Report Mask(THUMB) -Compile for the Thumb not the ARM +Target Report RejectNegative Mask(THUMB) +Generate code for Thumb state mthumb-interwork Target Report Mask(INTERWORK) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 2a46c377b0e..848aa3746e0 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -10282,15 +10282,15 @@ there is a function name embedded immediately preceding this location and has length @code{((pc[-3]) & 0xff000000)}. @item -mthumb +@itemx -marm +@opindex marm @opindex mthumb -Generate code for the Thumb instruction set. The default is to -use the 32-bit ARM instruction set. -This option automatically enables either 16-bit Thumb-1 or -mixed 16/32-bit Thumb-2 instructions based on the @option{-mcpu=@var{name}} -and @option{-march=@var{name}} options. This option is not passed to the -assembler. If you want to force assembler files to be interpreted as Thumb code, -either add a @samp{.thumb} directive to the source or pass the @option{-mthumb} -option directly to the assembler by prefixing it with @option{-Wa}. + +Select between generating code that executes in ARM and Thumb +states. The default for most configurations is to generate code +that executes in ARM state, but the default can be changed by +configuring GCC with the @option{--with-mode=}@var{state} +configure option. @item -mtpcs-frame @opindex mtpcs-frame -- 2.30.2