From eed9f49279017085917243523c326a77904a56b5 Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 21 Sep 2022 14:43:44 +0100 Subject: [PATCH] --- openpower/sv.mdwn | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn index f7d524584..71e73cd6f 100644 --- a/openpower/sv.mdwn +++ b/openpower/sv.mdwn @@ -312,11 +312,12 @@ Therefore to avoid risk and long-term damage to the Power ISA: * *even Unvectoriseable* "Defined Words" (`mtmsr`) must have the corresponding SVP64 Prefixed Space `RESERVED`, permanently requiring - Illegal Instruction to be raised (the 64-bit encoding allocated - to `sv.mtmsr` if illegally attempted must be **defined** to - raise an Exception) + Illegal Instruction to be raised (the 64-bit encoding corresponding + to an illegal `sv.mtmsr` if ever incorrectly attempted must be + **defined** to raise an Exception) * *Even instructions that may not be Scalar* (although for various - practical reasons this is extremely rare if not impossible) + practical reasons this is extremely rare if not impossible, + if not just generally "strongly discouraged") which have no meaning or use as a 32-bit Scalar "Defined Word", **must** still have the Scalar "Defined Word" `RESERVED` in the scalar opcode space, as an Illegal Instruction. -- 2.30.2