From ef4c1f851dd032f89bc4db0df0d45110d6fa32e9 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 27 Jun 2019 07:30:49 +0100 Subject: [PATCH] add SUBVL CSR set --- riscv/processor.cc | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/riscv/processor.cc b/riscv/processor.cc index 934a6b0..19ebffc 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -507,10 +507,17 @@ reg_t processor_t::set_csr(int which, reg_t val, bool imm_mode) // bits 0-5: mvl - 6-11: vl - 12-17: srcoffs - 18-23: destoffs set_csr(CSR_USVMVL, get_field(val, SV_STATE_VL )+1); set_csr(CSR_USVVL , get_field(val, SV_STATE_MVL)+1); + set_csr(CSR_USVSUBVL , get_field(val, SV_STATE_SUBVL)+1); + // decode (and limit) src/dest VL offsets reg_t srcoffs = get_field(val, SV_STATE_SRCOFFS); reg_t destoffs = get_field(val, SV_STATE_DESTOFFS); state.sv().srcoffs = std::min(srcoffs , state.sv().vl-1); state.sv().destoffs = std::min(destoffs, state.sv().vl-1); + // decode (and limit) src/dest SUBVL offsets + reg_t subsrcoffs = get_field(val, SV_STATE_SSVOFFS); + reg_t subdestoffs = get_field(val, SV_STATE_DSVOFFS); + state.sv().ssvoffs = std::min(subsrcoffs , state.sv().subvl-1); + state.sv().dsvoffs = std::min(subdestoffs, state.sv().subvl-1); //int state_bank = get_field(val, SV_STATE_BANK); //int state_size = get_field(val, SV_STATE_SIZE); //set_csr(CSR_USVCFG, state_bank | (state_size << 3)); @@ -521,7 +528,7 @@ reg_t processor_t::set_csr(int which, reg_t val, bool imm_mode) int old_bank = state.sv().state_bank; int old_size = state.sv().state_size; state.sv().state_bank = get_field(val, SV_CFG_BANK); - state.sv().state_size = get_field(val, SV_CFG_SIZE) >> 3; + state.sv().state_size = get_field(val, SV_CFG_SIZE); if (old_bank != state.sv().state_bank || old_size != state.sv().state_size) { -- 2.30.2