From ef6d5ee9f34bce89c8bb8ff001be4c70a2a5421d Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 25 Jul 2013 10:35:33 +0200 Subject: [PATCH] nvc0: properly align NVE4_COMPUTE_MP_TEMP_SIZE MP_TEMP_SIZE must be aligned to 0x8000, while TEMP_SIZE on NVE4_3D must be aligned to 0x20000, so perform both alignments to be sure we allocate enough space (actually the bo will most likely use 128 KiB pages and not aligning to that would be a waste anyway). Cc: "9.2" mesa-stable@lists.freedesktop.org --- src/gallium/drivers/nvc0/nvc0_screen.c | 1 + src/gallium/drivers/nvc0/nve4_compute.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c index 201d12fd3df..171a30256a4 100644 --- a/src/gallium/drivers/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nvc0/nvc0_screen.c @@ -512,6 +512,7 @@ nvc0_screen_resize_tls_area(struct nvc0_screen *screen, } size *= (screen->base.device->chipset >= 0xe0) ? 64 : 48; /* max warps */ + size = align(size, 0x8000); size *= screen->mp_count; size = align(size, 1 << 17); diff --git a/src/gallium/drivers/nvc0/nve4_compute.c b/src/gallium/drivers/nvc0/nve4_compute.c index 258564bf1c4..abadd601a68 100644 --- a/src/gallium/drivers/nvc0/nve4_compute.c +++ b/src/gallium/drivers/nvc0/nve4_compute.c @@ -78,11 +78,11 @@ nve4_screen_compute_setup(struct nvc0_screen *screen, */ BEGIN_NVC0(push, NVE4_COMPUTE(MP_TEMP_SIZE_HIGH(0)), 3); PUSH_DATAh(push, screen->tls->size / screen->mp_count); - PUSH_DATA (push, screen->tls->size / screen->mp_count); + PUSH_DATA (push, (screen->tls->size / screen->mp_count) & ~0x7fff); PUSH_DATA (push, 0xff); BEGIN_NVC0(push, NVE4_COMPUTE(MP_TEMP_SIZE_HIGH(1)), 3); PUSH_DATAh(push, screen->tls->size / screen->mp_count); - PUSH_DATA (push, screen->tls->size / screen->mp_count); + PUSH_DATA (push, (screen->tls->size / screen->mp_count) & ~0x7fff); PUSH_DATA (push, 0xff); /* Unified address space ? Who needs that ? Certainly not OpenCL. -- 2.30.2