From ef984648a15c2c9b8b5127c1ac2e10f3f9793cec Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Wed, 25 Oct 2006 12:14:41 +0200 Subject: [PATCH] re PR target/28909 (Missed optimization with x86 sync builtins) PR target/28909 * config/i386/sync.md ("sync_add", "sync_sub"): Use inc and dec instructions for TARGET_USE_INCDEC. ("*sync_compare_and_swap"): Fix -masm=intel template. ("sync_double_compare_and_swap"): Likewise. ("*sync_double_compare_and_swapdi_pic"): Likewise. ("*sync_compare_and_swap_cc"): Likewise. ("sync_double_compare_and_swap_cc"): Likewise. ("*sync_double_compare_and_swap_ccdi_pic"): Likewise. ("sync_old_add"): Likewise. ("sync_lock_test_and_set"): Likewise. ("sync_lock_test_and_set"): Likewise. ("sync_add"): Likewise. ("sync_sub"): Likewise. ("sync_ior"): Likewise. ("sync_and"): Likewise. ("sync_xor"): Likewise. From-SVN: r118028 --- gcc/ChangeLog | 20 +++++++++++++++++++ gcc/config/i386/sync.md | 44 ++++++++++++++++++++++++++++++----------- 2 files changed, 52 insertions(+), 12 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 90586312033..a4ffc2d9eb3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,23 @@ +2006-10-25 Uros Bizjak + + PR target/28909 + * config/i386/sync.md ("sync_add", "sync_sub"): + Use inc and dec instructions for TARGET_USE_INCDEC. + ("*sync_compare_and_swap"): Fix -masm=intel template. + ("sync_double_compare_and_swap"): Likewise. + ("*sync_double_compare_and_swapdi_pic"): Likewise. + ("*sync_compare_and_swap_cc"): Likewise. + ("sync_double_compare_and_swap_cc"): Likewise. + ("*sync_double_compare_and_swap_ccdi_pic"): Likewise. + ("sync_old_add"): Likewise. + ("sync_lock_test_and_set"): Likewise. + ("sync_lock_test_and_set"): Likewise. + ("sync_add"): Likewise. + ("sync_sub"): Likewise. + ("sync_ior"): Likewise. + ("sync_and"): Likewise. + ("sync_xor"): Likewise. + 2006-10-25 Uros Bizjak * optabs.h (enum optab_index): Rename OTI_drem to OTI_remainder. diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md index 489de1914d2..58e047bc234 100644 --- a/gcc/config/i386/sync.md +++ b/gcc/config/i386/sync.md @@ -82,7 +82,7 @@ UNSPECV_CMPXCHG_1)) (clobber (reg:CC FLAGS_REG))] "TARGET_CMPXCHG" - "lock\;cmpxchg{}\t{%3, %1|%1, %3}") + "lock{\;| }cmpxchg{\t%3, %1| %1, %3}") (define_insn "sync_double_compare_and_swap" [(set (match_operand:DCASMODE 0 "register_operand" "=A") @@ -96,7 +96,7 @@ UNSPECV_CMPXCHG_1)) (clobber (reg:CC FLAGS_REG))] "" - "lock\;cmpxchgb\t%1") + "lock{\;| }cmpxchgb{\t| }%1") (define_insn "*sync_double_compare_and_swapdi_pic" [(set (match_operand:DI 0 "register_operand" "=A") @@ -110,7 +110,7 @@ UNSPECV_CMPXCHG_1)) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic" - "xchg{l}\t%%ebx, %3\;lock\;cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3") + "xchg{l}\t%%ebx, %3\;lock{\;| }cmpxchg8b{\t| }%1\;xchg{l}\t%%ebx, %3") (define_expand "sync_compare_and_swap_cc" [(parallel @@ -168,7 +168,7 @@ [(match_dup 1) (match_dup 2) (match_dup 3)] UNSPECV_CMPXCHG_2) (match_dup 2)))] "TARGET_CMPXCHG" - "lock\;cmpxchg{}\t{%3, %1|%1, %3}") + "lock{\;| }cmpxchg{\t%3, %1| %1, %3}") (define_insn "sync_double_compare_and_swap_cc" [(set (match_operand:DCASMODE 0 "register_operand" "=A") @@ -187,7 +187,7 @@ UNSPECV_CMPXCHG_2) (match_dup 2)))] "" - "lock\;cmpxchgb\t%1") + "lock{\;| }cmpxchgb{\t| }%1") (define_insn "*sync_double_compare_and_swap_ccdi_pic" [(set (match_operand:DI 0 "register_operand" "=A") @@ -206,7 +206,7 @@ UNSPECV_CMPXCHG_2) (match_dup 2)))] "!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic" - "xchg{l}\t%%ebx, %3\;lock\;cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3") + "xchg{l}\t%%ebx, %3\;lock{\;| }cmpxchg8b{\t| }%1\;xchg{l}\t%%ebx, %3") (define_insn "sync_old_add" [(set (match_operand:IMODE 0 "register_operand" "=") @@ -217,7 +217,7 @@ (match_operand:IMODE 2 "register_operand" "0"))) (clobber (reg:CC FLAGS_REG))] "TARGET_XADD" - "lock\;xadd{}\t{%0, %1|%1, %0}") + "lock{\;| }xadd{\t%0, %1| %1, %0}") ;; Recall that xchg implicitly sets LOCK#, so adding it again wastes space. (define_insn "sync_lock_test_and_set" @@ -237,7 +237,17 @@ UNSPECV_LOCK)) (clobber (reg:CC FLAGS_REG))] "" - "lock\;add{}\t{%1, %0|%0, %1}") +{ + if (TARGET_USE_INCDEC) + { + if (operands[1] == const1_rtx) + return "lock{\;| }inc{\t| }%0"; + if (operands[1] == constm1_rtx) + return "lock{\;| }dec{\t| }%0"; + } + + return "lock{\;| }add{\t%1, %0| %0, %1}"; +}) (define_insn "sync_sub" [(set (match_operand:IMODE 0 "memory_operand" "+m") @@ -247,7 +257,17 @@ UNSPECV_LOCK)) (clobber (reg:CC FLAGS_REG))] "" - "lock\;sub{}\t{%1, %0|%0, %1}") +{ + if (TARGET_USE_INCDEC) + { + if (operands[1] == const1_rtx) + return "lock{\;| }dec{\t| }%0"; + if (operands[1] == constm1_rtx) + return "lock{\;| }inc{\t| }%0"; + } + + return "lock{\;| }sub{\t%1, %0| %0, %1}"; +}) (define_insn "sync_ior" [(set (match_operand:IMODE 0 "memory_operand" "+m") @@ -257,7 +277,7 @@ UNSPECV_LOCK)) (clobber (reg:CC FLAGS_REG))] "" - "lock\;or{}\t{%1, %0|%0, %1}") + "lock{\;| }or{\t%1, %0| %0, %1}") (define_insn "sync_and" [(set (match_operand:IMODE 0 "memory_operand" "+m") @@ -267,7 +287,7 @@ UNSPECV_LOCK)) (clobber (reg:CC FLAGS_REG))] "" - "lock\;and{}\t{%1, %0|%0, %1}") + "lock{\;| }and{\t%1, %0| %0, %1}") (define_insn "sync_xor" [(set (match_operand:IMODE 0 "memory_operand" "+m") @@ -277,4 +297,4 @@ UNSPECV_LOCK)) (clobber (reg:CC FLAGS_REG))] "" - "lock\;xor{}\t{%1, %0|%0, %1}") + "lock{\;| }xor{\t%1, %0| %0, %1}") -- 2.30.2