From efdb7fa9a83b0a216b1837a5912b71669bf3f984 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Mon, 2 Mar 2020 14:44:55 +0200 Subject: [PATCH] anv: force whole EU array to be powered for perf queries MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Because of functional requirements for Gen11, when perf is enabled we only power half the EU array. This change forces it to enable everything. Signed-off-by: Lionel Landwerlin Acked-by: Tapani Pälli Reviewed-by: Rafael Antognolli Reviewed-by: Mark Janes Reviewed-by: Kenneth Graunke Part-of: --- src/intel/vulkan/anv_perf.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/intel/vulkan/anv_perf.c b/src/intel/vulkan/anv_perf.c index 5c8fd5288b2..9ee54a8c2a4 100644 --- a/src/intel/vulkan/anv_perf.c +++ b/src/intel/vulkan/anv_perf.c @@ -83,6 +83,16 @@ anv_device_perf_open(struct anv_device *device, uint64_t metric_id) properties[p++] = DRM_I915_PERF_PROP_HOLD_PREEMPTION; properties[p++] = true; + /* If global SSEU is available, pin it to the default. This will ensure on + * Gen11 for instance we use the full EU array. Initially when perf was + * enabled we would use only half on Gen11 because of functional + * requirements. + */ + if (device->physical->perf->i915_perf_version >= 4) { + properties[p++] = DRM_I915_PERF_PROP_GLOBAL_SSEU; + properties[p++] = (uintptr_t) &device->physical->perf->sseu; + } + memset(¶m, 0, sizeof(param)); param.flags = 0; param.flags |= I915_PERF_FLAG_FD_CLOEXEC | I915_PERF_FLAG_FD_NONBLOCK; -- 2.30.2