From f009978996aa1c65934b0960953f4cb65b7ac905 Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Thu, 24 Oct 1996 21:19:22 +0000 Subject: [PATCH] * simops.c (OP_500): Mask off low bit in displacement for sld.w. (OP_501): Similarly. More bugs exposed by tda testing. --- sim/v850/ChangeLog | 4 ++++ sim/v850/simops.c | 4 ++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog index 1325b2aefc8..307d316c2b7 100644 --- a/sim/v850/ChangeLog +++ b/sim/v850/ChangeLog @@ -1,5 +1,9 @@ Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com) + * simops.c (OP_500): Mask off low bit in displacement + for sld.w. + (OP_501): Similarly. + * simops.c (OP_500): Fix displacement handling for sld.w. (OP_501): Similarly for sst.w. diff --git a/sim/v850/simops.c b/sim/v850/simops.c index 77102328f1d..8993af8cc6c 100644 --- a/sim/v850/simops.c +++ b/sim/v850/simops.c @@ -455,7 +455,7 @@ OP_500 () trace_input ("sld.w", OP_LOAD16, 4); temp = OP[1]; - temp &= 0x7f; + temp &= 0x7e; op2 = temp << 1; result = load_mem (State.regs[30] + op2, 4); State.regs[OP[0]] = result; @@ -504,7 +504,7 @@ OP_501 () trace_input ("sst.w", OP_STORE16, 4); op0 = State.regs[OP[0]]; temp = OP[1]; - temp &= 0x7f; + temp &= 0x7e; op1 = temp << 1; store_mem (State.regs[30] + op1, 4, op0); trace_output (OP_STORE16); -- 2.30.2