From f0100003f9fbd1ab461f3101a69bfa5454177cce Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Thu, 23 Jan 2020 14:08:15 +0000
Subject: [PATCH]

---
 HDL_workflow.mdwn | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/HDL_workflow.mdwn b/HDL_workflow.mdwn
index 663296d3c..3a9e574e3 100644
--- a/HDL_workflow.mdwn
+++ b/HDL_workflow.mdwn
@@ -148,3 +148,6 @@ The reasons for doing a proper modularisation job are several-fold:
 Find appropriate tutorials for nmigen and yosys, as well as symbiyosys.
 
 * Although a verilog example this is very useful to do <https://symbiyosys.readthedocs.io/en/latest/quickstart.html#first-step-a-simple-bmc-example>
+* There exist several nmigen examples which are also executable <https://github.com/m-labs/nmigen/tree/master/examples/>
+* This tutorial looks pretty good and will get you started <http://blog.lambdaconcept.com/doku.php?id=nmigen:nmigen_install> and walks not just through simulation, it takes you through using gtkwave as well.
+
-- 
2.30.2