From f039819018eb7f0187dfd80342bcf0633af3da81 Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Wed, 20 Nov 1996 18:32:44 +0000 Subject: [PATCH] * mn10300-opc.c: Fix handling of register list operand for "call", "ret", and "rets" instructions. Stuff noticed while working on disasembler. --- opcodes/ChangeLog | 3 +++ opcodes/mn10300-opc.c | 18 +++++++++--------- 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index aa0832f1a03..03a28d6af0f 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,8 @@ Wed Nov 20 10:37:13 1996 Jeffrey A Law (law@cygnus.com) + * mn10300-opc.c: Fix handling of register list operand for + "call", "ret", and "rets" instructions. + * mn10300-dis.c (disassemble): Print PC-relative and memory addresses symbolically if possible. * mn10300-opc.c: Distinguish between absolute memory addresses, diff --git a/opcodes/mn10300-opc.c b/opcodes/mn10300-opc.c index 32b6ec0a68d..ca40f88752b 100644 --- a/opcodes/mn10300-opc.c +++ b/opcodes/mn10300-opc.c @@ -159,13 +159,13 @@ const struct mn10300_operand mn10300_operands[] = { #define IMM8E (D16_SHIFT+1) {8, 0, MN10300_OPERAND_EXTENDED}, -#define IMM8E_SHIFT8 (IMM8E+1) - {8, 8, MN10300_OPERAND_EXTENDED}, +#define REGSE_SHIFT8 (IMM8E+1) + {8, 8, MN10300_OPERAND_EXTENDED | MN10300_OPERAND_REG_LIST}, -#define IMM8_SHIFT8 (IMM8E_SHIFT8 + 1) - {8, 8, 0}, +#define REGS_SHIFT8 (REGSE_SHIFT8 + 1) + {8, 8, MN10300_OPERAND_REG_LIST}, -#define REGS (IMM8_SHIFT8+1) +#define REGS (REGS_SHIFT8+1) {8, 0, MN10300_OPERAND_REG_LIST}, } ; @@ -423,15 +423,15 @@ const struct mn10300_opcode mn10300_opcodes[] = { { "jmp", 0xf0f4, 0xfffc, FMT_D0, {PAREN,AN0,PAREN}}, { "jmp", 0xcc0000, 0xff0000, FMT_S2, {IMM16_PCREL}}, { "jmp", 0xdc000000, 0xff000000, FMT_S4, {IMM32_HIGH24}}, -{ "call", 0xcd000000, 0xff000000, FMT_S4, {D16_SHIFT,IMM8,IMM8E}}, +{ "call", 0xcd000000, 0xff000000, FMT_S4, {D16_SHIFT,REGS,IMM8E}}, { "call", 0xdd000000, 0xff000000, FMT_S6, - {IMM32_HIGH24_LOWSHIFT16,IMM8E_SHIFT8,IMM8E}}, + {IMM32_HIGH24_LOWSHIFT16,REGSE_SHIFT8,IMM8E}}, { "calls", 0xf0f0, 0xfffc, FMT_D0, {PAREN,AN0,PAREN}}, { "calls", 0xfaff0000, 0xffff0000, FMT_D2, {IMM16_PCREL}}, { "calls", 0xfcff0000, 0xffff0000, FMT_D4, {IMM32_PCREL}}, -{ "ret", 0xdf0000, 0xff0000, FMT_S2, {IMM8_SHIFT8, IMM8}}, -{ "retf", 0xde0000, 0xff0000, FMT_S2, {IMM8_SHIFT8, IMM8}}, +{ "ret", 0xdf0000, 0xff0000, FMT_S2, {REGS_SHIFT8, IMM8}}, +{ "retf", 0xde0000, 0xff0000, FMT_S2, {REGS_SHIFT8, IMM8}}, { "rets", 0xf0fc, 0xffff, FMT_D0, {UNUSED}}, { "rti", 0xf0fd, 0xffff, FMT_D0, {UNUSED}}, { "trap", 0xf0fe, 0xffff, FMT_D0, {UNUSED}}, -- 2.30.2