From f0be276c2e84716856ae87b4b0f0411700ed5be4 Mon Sep 17 00:00:00 2001 From: Brian Date: Sun, 20 Jan 2008 17:27:05 -0700 Subject: [PATCH] Cell: clean-up/re-org tile code Also, support 16 or 32-bit Z buffer at runtime. --- src/mesa/pipe/cell/spu/spu_main.c | 41 +++++------- src/mesa/pipe/cell/spu/spu_main.h | 24 ++++++- src/mesa/pipe/cell/spu/spu_tile.c | 39 +---------- src/mesa/pipe/cell/spu/spu_tile.h | 44 ++++++++----- src/mesa/pipe/cell/spu/spu_tri.c | 104 +++++++++++++++++++----------- 5 files changed, 136 insertions(+), 116 deletions(-) diff --git a/src/mesa/pipe/cell/spu/spu_main.c b/src/mesa/pipe/cell/spu/spu_main.c index 30c39aab68d..8e9352deff0 100644 --- a/src/mesa/pipe/cell/spu/spu_main.c +++ b/src/mesa/pipe/cell/spu/spu_main.c @@ -78,12 +78,10 @@ static void really_clear_tiles(uint surfaceIndex) { const uint num_tiles = spu.fb.width_tiles * spu.fb.height_tiles; - uint i, j; + uint i; if (surfaceIndex == 0) { - for (i = 0; i < TILE_SIZE; i++) - for (j = 0; j < TILE_SIZE; j++) - ctile[i][j] = spu.fb.color_clear_value; /*0xff00ff;*/ + clear_c_tile(ctile); for (i = spu.init.id; i < num_tiles; i += spu.init.num_spus) { uint tx = i % spu.fb.width_tiles; @@ -94,9 +92,7 @@ really_clear_tiles(uint surfaceIndex) } } else { - for (i = 0; i < TILE_SIZE; i++) - for (j = 0; j < TILE_SIZE; j++) - ztile[i][j] = spu.fb.depth_clear_value; + clear_z_tile(&ztile); for (i = spu.init.id; i < num_tiles; i += spu.init.num_spus) { uint tx = i % spu.fb.width_tiles; @@ -116,7 +112,7 @@ static void cmd_clear_surface(const struct cell_command_clear_surface *clear) { const uint num_tiles = spu.fb.width_tiles * spu.fb.height_tiles; - uint i, j; + uint i; if (Debug) printf("SPU %u: CLEAR SURF %u to 0x%08x\n", spu.init.id, @@ -137,14 +133,12 @@ cmd_clear_surface(const struct cell_command_clear_surface *clear) #endif if (clear->surface == 0) { - for (i = 0; i < TILE_SIZE; i++) - for (j = 0; j < TILE_SIZE; j++) - ctile[i][j] = clear->value; + spu.fb.color_clear_value = clear->value; + clear_c_tile(ctile); } else { - for (i = 0; i < TILE_SIZE; i++) - for (j = 0; j < TILE_SIZE; j++) - ztile[i][j] = clear->value; + spu.fb.depth_clear_value = clear->value; + clear_z_tile(&ztile); } /* @@ -158,7 +152,7 @@ cmd_clear_surface(const struct cell_command_clear_surface *clear) if (clear->surface == 0) put_tile(tx, ty, (uint *) ctile, TAG_SURFACE_CLEAR, 0); else - put_tile(tx, ty, (uint *) ztile, TAG_SURFACE_CLEAR, 1); + put_tile(tx, ty, (uint *) ztile.t32, TAG_SURFACE_CLEAR, 1); /* XXX we don't want this here, but it fixes bad tile results */ } @@ -299,7 +293,7 @@ cmd_render(const struct cell_command_render *render) */ if (spu.depth_stencil.depth.enabled) { if (tile_status_z[ty][tx] != TILE_STATUS_CLEAR) { - get_tile(tx, ty, (uint *) ztile, TAG_READ_TILE_Z, 1); + get_tile(tx, ty, (uint *) ztile.t32, TAG_READ_TILE_Z, 1); } } @@ -327,7 +321,7 @@ cmd_render(const struct cell_command_render *render) } if (spu.depth_stencil.depth.enabled) { if (tile_status_z[ty][tx] == TILE_STATUS_DIRTY) { - put_tile(tx, ty, (uint *) ztile, TAG_WRITE_TILE_Z, 1); + put_tile(tx, ty, (uint *) ztile.t32, TAG_WRITE_TILE_Z, 1); tile_status_z[ty][tx] = TILE_STATUS_DEFINED; } } @@ -366,13 +360,12 @@ cmd_framebuffer(const struct cell_command_framebuffer *cmd) spu.fb.width_tiles = (spu.fb.width + TILE_SIZE - 1) / TILE_SIZE; spu.fb.height_tiles = (spu.fb.height + TILE_SIZE - 1) / TILE_SIZE; - if (cmd->depth_format == PIPE_FORMAT_Z16_UNORM) { - ASSERT(ZSIZE == 2); - } - else if (cmd->depth_format == PIPE_FORMAT_Z32_UNORM) { - ASSERT(ZSIZE == 4); - } - + if (spu.fb.depth_format == PIPE_FORMAT_Z32_UNORM) + spu.fb.zsize = 4; + else if (spu.fb.depth_format == PIPE_FORMAT_Z16_UNORM) + spu.fb.zsize = 2; + else + spu.fb.zsize = 0; } diff --git a/src/mesa/pipe/cell/spu/spu_main.h b/src/mesa/pipe/cell/spu/spu_main.h index cd2afbe9bf1..2aa7015ae3b 100644 --- a/src/mesa/pipe/cell/spu/spu_main.h +++ b/src/mesa/pipe/cell/spu/spu_main.h @@ -32,8 +32,6 @@ #include "pipe/cell/common.h" #include "pipe/p_state.h" -/** XXX temp bytes/z value */ -#define ZSIZE 2 struct spu_framebuffer { void *color_start; /**< addr of color surface in main memory */ @@ -45,6 +43,8 @@ struct spu_framebuffer { uint color_clear_value; uint depth_clear_value; + + uint zsize; /**< 0, 2 or 4 bytes per Z */ } ALIGN16_ATTRIB; @@ -90,8 +90,26 @@ extern struct spu_global spu; } -void +extern void wait_on_mask(unsigned tag); +static INLINE void +memset16(ushort *d, ushort value, uint count) +{ + uint i; + for (i = 0; i < count; i++) + d[i] = value; +} + + +static INLINE void +memset32(uint *d, uint value, uint count) +{ + uint i; + for (i = 0; i < count; i++) + d[i] = value; +} + + #endif /* SPU_MAIN_H */ diff --git a/src/mesa/pipe/cell/spu/spu_tile.c b/src/mesa/pipe/cell/spu/spu_tile.c index 13fc5e345f4..9895360f5f6 100644 --- a/src/mesa/pipe/cell/spu/spu_tile.c +++ b/src/mesa/pipe/cell/spu/spu_tile.c @@ -32,11 +32,7 @@ uint ctile[TILE_SIZE][TILE_SIZE] ALIGN16_ATTRIB; -#if ZSIZE == 2 -ushort ztile[TILE_SIZE][TILE_SIZE] ALIGN16_ATTRIB; -#else -uint ztile[TILE_SIZE][TILE_SIZE] ALIGN16_ATTRIB; -#endif +tile_t ztile ALIGN16_ATTRIB; ubyte tile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB; ubyte tile_status_z[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB; @@ -47,7 +43,7 @@ void get_tile(uint tx, uint ty, uint *tile, int tag, int zBuf) { const uint offset = ty * spu.fb.width_tiles + tx; - const uint bytesPerTile = TILE_SIZE * TILE_SIZE * (zBuf ? ZSIZE : 4); + const uint bytesPerTile = TILE_SIZE * TILE_SIZE * (zBuf ? spu.fb.zsize : 4); const ubyte *src = zBuf ? spu.fb.depth_start : spu.fb.color_start; src += offset * bytesPerTile; @@ -72,7 +68,7 @@ void put_tile(uint tx, uint ty, const uint *tile, int tag, int zBuf) { const uint offset = ty * spu.fb.width_tiles + tx; - const uint bytesPerTile = TILE_SIZE * TILE_SIZE * (zBuf ? ZSIZE : 4); + const uint bytesPerTile = TILE_SIZE * TILE_SIZE * (zBuf ? spu.fb.zsize : 4); ubyte *dst = zBuf ? spu.fb.depth_start : spu.fb.color_start; dst += offset * bytesPerTile; @@ -93,32 +89,3 @@ put_tile(uint tx, uint ty, const uint *tile, int tag, int zBuf) 0 /* rid */); } - -void -clear_tile(uint tile[TILE_SIZE][TILE_SIZE], uint value) -{ - uint i, j; - for (i = 0; i < TILE_SIZE; i++) { - for (j = 0; j < TILE_SIZE; j++) { - tile[i][j] = value; - } - } -} - -void -clear_tile_z( -#if ZSIZE == 2 - ushort tile[TILE_SIZE][TILE_SIZE], -#else - uint tile[TILE_SIZE][TILE_SIZE], -#endif - uint value) -{ - uint i, j; - for (i = 0; i < TILE_SIZE; i++) { - for (j = 0; j < TILE_SIZE; j++) { - tile[i][j] = value; - } - } -} - diff --git a/src/mesa/pipe/cell/spu/spu_tile.h b/src/mesa/pipe/cell/spu/spu_tile.h index 7c288a1f915..4c8db581f3f 100644 --- a/src/mesa/pipe/cell/spu/spu_tile.h +++ b/src/mesa/pipe/cell/spu/spu_tile.h @@ -39,12 +39,14 @@ #define MAX_HEIGHT 1024 +typedef union { + ushort t16[TILE_SIZE][TILE_SIZE]; + uint t32[TILE_SIZE][TILE_SIZE]; +} tile_t; + + extern uint ctile[TILE_SIZE][TILE_SIZE] ALIGN16_ATTRIB; -#if ZSIZE == 2 -extern ushort ztile[TILE_SIZE][TILE_SIZE] ALIGN16_ATTRIB; -#else -extern uint ztile[TILE_SIZE][TILE_SIZE] ALIGN16_ATTRIB; -#endif +extern tile_t ztile ALIGN16_ATTRIB; #define TILE_STATUS_CLEAR 1 @@ -61,17 +63,29 @@ get_tile(uint tx, uint ty, uint *tile, int tag, int zBuf); void put_tile(uint tx, uint ty, const uint *tile, int tag, int zBuf); -void -clear_tile(uint tile[TILE_SIZE][TILE_SIZE], uint value); -void -clear_tile_z( -#if ZSIZE == 2 - ushort tile[TILE_SIZE][TILE_SIZE], -#else - uint tile[TILE_SIZE][TILE_SIZE], -#endif - uint value); + +static INLINE void +clear_c_tile(uint tile[TILE_SIZE][TILE_SIZE]) +{ + memset32((uint*) tile, spu.fb.color_clear_value, TILE_SIZE * TILE_SIZE); +} + + +static INLINE void +clear_z_tile(tile_t *ztile) +{ + if (spu.fb.depth_format == PIPE_FORMAT_Z16_UNORM) { + memset16((ushort*) ztile->t16, + spu.fb.depth_clear_value, + TILE_SIZE * TILE_SIZE); + } + else { + memset32((uint*) ztile->t32, + spu.fb.depth_clear_value, + TILE_SIZE * TILE_SIZE); + } +} #endif /* SPU_TILE_H */ diff --git a/src/mesa/pipe/cell/spu/spu_tri.c b/src/mesa/pipe/cell/spu/spu_tri.c index 0b8533092e9..6de07614fbc 100644 --- a/src/mesa/pipe/cell/spu/spu_tri.c +++ b/src/mesa/pipe/cell/spu/spu_tri.c @@ -258,22 +258,12 @@ do_depth_test(struct setup_stage *setup, int x, int y, unsigned mask) int ix = x - setup->cliprect_minx; int iy = y - setup->cliprect_miny; float zvals[4]; - float zscale = 65535.0; - - if (ZSIZE == 2) { - ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z16_UNORM); - } - else { - ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z32_UNORM); - } - ASSERT(sizeof(ztile[0][0]) == ZSIZE); - eval_z(setup, (float) x, (float) y, zvals); if (tile_status_z[setup->ty][setup->tx] == TILE_STATUS_CLEAR) { /* now, _really_ clear the tile */ - clear_tile_z(ztile, spu.fb.depth_clear_value); + clear_z_tile(&ztile); } else { /* make sure we've got the tile from main mem */ @@ -282,36 +272,74 @@ do_depth_test(struct setup_stage *setup, int x, int y, unsigned mask) tile_status_z[setup->ty][setup->tx] = TILE_STATUS_DIRTY; - if (mask & MASK_TOP_LEFT) { - uint z = (uint) (zvals[0] * zscale); - if (z < ztile[iy][ix]) - ztile[iy][ix] = z; - else - mask &= ~MASK_TOP_LEFT; - } + if (spu.fb.depth_format == PIPE_FORMAT_Z16_UNORM) { + const float zscale = 65535.0; + if (mask & MASK_TOP_LEFT) { + uint z = (uint) (zvals[0] * zscale); + if (z < ztile.t16[iy][ix]) + ztile.t16[iy][ix] = z; + else + mask &= ~MASK_TOP_LEFT; + } - if (mask & MASK_TOP_RIGHT) { - uint z = (uint) (zvals[1] * zscale); - if (z < ztile[iy][ix+1]) - ztile[iy][ix+1] = z; - else - mask &= ~MASK_TOP_RIGHT; - } + if (mask & MASK_TOP_RIGHT) { + uint z = (uint) (zvals[1] * zscale); + if (z < ztile.t16[iy][ix+1]) + ztile.t16[iy][ix+1] = z; + else + mask &= ~MASK_TOP_RIGHT; + } - if (mask & MASK_BOTTOM_LEFT) { - uint z = (uint) (zvals[2] * zscale); - if (z < ztile[iy+1][ix]) - ztile[iy+1][ix] = z; - else - mask &= ~MASK_BOTTOM_LEFT; + if (mask & MASK_BOTTOM_LEFT) { + uint z = (uint) (zvals[2] * zscale); + if (z < ztile.t16[iy+1][ix]) + ztile.t16[iy+1][ix] = z; + else + mask &= ~MASK_BOTTOM_LEFT; + } + + if (mask & MASK_BOTTOM_RIGHT) { + uint z = (uint) (zvals[3] * zscale); + if (z < ztile.t16[iy+1][ix+1]) + ztile.t16[iy+1][ix+1] = z; + else + mask &= ~MASK_BOTTOM_RIGHT; + } } + else { + const float zscale = (float) 0xffffffff; + ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z32_UNORM); + if (mask & MASK_TOP_LEFT) { + uint z = (uint) (zvals[0] * zscale); + if (z < ztile.t32[iy][ix]) + ztile.t32[iy][ix] = z; + else + mask &= ~MASK_TOP_LEFT; + } - if (mask & MASK_BOTTOM_RIGHT) { - uint z = (uint) (zvals[3] * zscale); - if (z < ztile[iy+1][ix+1]) - ztile[iy+1][ix+1] = z; - else - mask &= ~MASK_BOTTOM_RIGHT; + if (mask & MASK_TOP_RIGHT) { + uint z = (uint) (zvals[1] * zscale); + if (z < ztile.t32[iy][ix+1]) + ztile.t32[iy][ix+1] = z; + else + mask &= ~MASK_TOP_RIGHT; + } + + if (mask & MASK_BOTTOM_LEFT) { + uint z = (uint) (zvals[2] * zscale); + if (z < ztile.t32[iy+1][ix]) + ztile.t32[iy+1][ix] = z; + else + mask &= ~MASK_BOTTOM_LEFT; + } + + if (mask & MASK_BOTTOM_RIGHT) { + uint z = (uint) (zvals[3] * zscale); + if (z < ztile.t32[iy+1][ix+1]) + ztile.t32[iy+1][ix+1] = z; + else + mask &= ~MASK_BOTTOM_RIGHT; + } } return mask; @@ -345,7 +373,7 @@ emit_quad( struct setup_stage *setup, int x, int y, unsigned mask ) if (mask) { if (tile_status[setup->ty][setup->tx] == TILE_STATUS_CLEAR) { /* now, _really_ clear the tile */ - clear_tile(ctile, spu.fb.color_clear_value); + clear_c_tile(ctile); } else { /* make sure we've got the tile from main mem */ -- 2.30.2